Bibliographic Details
| Title: |
Effectiveness of a hardware-based approach to detect resistive-open defects in SRAM cells under process variations. |
| Authors: |
Gomez, A.F.1 fgomez@inaoep.mx, Lavratti, F.2, Medeiros, G.2, Sartori, M.2, Poehls, L. Bolzani2 leticia@poehls.com, Champac, V.1 champac@inaoep.mx, Vargas, F.2 |
| Source: |
Microelectronics Reliability. Dec2016, Vol. 67, p150-158. 9p. |
| Subjects: |
Static random access memory, Integrated memory circuits, Electric testing, Integrated circuits, Phase change memory |
| Abstract: |
Resistive-open defects in Static Random Access Memories (SRAMs) represent an important challenge for manufacturing test in submicron technologies as they may be masked by process variations, which in turn increases the number of test escapes. This paper evaluates the effectiveness of a hardware-based test approach that compares the current consumption of neighboring SRAM cells to detect resistive-open defects. The proposed approach is validated and its fault detection capabilities are analyzed for different defect sizes and taking into account process variations effects. Finally, the paper provides an evaluation of the minimum detectable resistive-open defect size for the proposed hardware-based approach under process variations effects. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
