APA (7th ed.) Citation

Kim, C., Burger, D., & Keckler, S. W. (2003). NONUNIFORM CACHE ARCHITECTURES FOR WIRE-DELAY DOMINATED ON-CHIP CACHES. IEEE Micro, 23(6), 99. https://doi.org/10.1109/MM.2003.1261393

Chicago Style (17th ed.) Citation

Kim, Changkyu, Doug Burger, and Stephen W. Keckler. "NONUNIFORM CACHE ARCHITECTURES FOR WIRE-DELAY DOMINATED ON-CHIP CACHES." IEEE Micro 23, no. 6 (2003): 99. https://doi.org/10.1109/MM.2003.1261393.

MLA (9th ed.) Citation

Kim, Changkyu, et al. "NONUNIFORM CACHE ARCHITECTURES FOR WIRE-DELAY DOMINATED ON-CHIP CACHES." IEEE Micro, vol. 23, no. 6, 2003, p. 99, https://doi.org/10.1109/MM.2003.1261393.