APA (7th ed.) Citation

Marsan-Loyer, C., Danovitch, D., & Boyer, N. (2017). Addressing Flux Dip Challenges for 3-D Integrated Large Die, Ultrafine Pitch Interconnect. Journal of Microelectronic & Electronic Packaging, 14(1), 32. https://doi.org/10.4071/imaps.348081

Chicago Style (17th ed.) Citation

Marsan-Loyer, C., D. Danovitch, and N. Boyer. "Addressing Flux Dip Challenges for 3-D Integrated Large Die, Ultrafine Pitch Interconnect." Journal of Microelectronic & Electronic Packaging 14, no. 1 (2017): 32. https://doi.org/10.4071/imaps.348081.

MLA (9th ed.) Citation

Marsan-Loyer, C., et al. "Addressing Flux Dip Challenges for 3-D Integrated Large Die, Ultrafine Pitch Interconnect." Journal of Microelectronic & Electronic Packaging, vol. 14, no. 1, 2017, p. 32, https://doi.org/10.4071/imaps.348081.