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Offloading Collective Operations to Programmable Logic.

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Title: Offloading Collective Operations to Programmable Logic.
Authors: Arap, Omer1, Brasilino, Lucas R.B.1, Kissel, Ezra1, Shroyer, Alexander1, Swany, Martin1
Source: IEEE Micro. Sep/Oct2017, Vol. 37 Issue 5, p52-60. 9p.
Subjects: Field programmable gate arrays, Programmable circuits, Message passing (Computer science), Computer interfaces, Parallel processing
Abstract: The authors describe their architecture and implementation for offloading collective operations to programmable logic in the communication substrate. Collective operations are widely used in parallel processing. Their design and implementation strategies affect the performance of many high-performance computing applications that utilize them. Collectives are central to the message passing interface (MPI) programming model. The programmable logic provided by field-programmable gate arrays (FPGAs) is a powerful option for creating task-specific logic to aid applications. The authors’ approach is applicable in scenarios where there is programmable logic in the communication pipeline and can be used to accelerate various network-based operations. In this article, the authors present a general collective offloading framework for use in applications using MPI. They evaluate their approach on the Xilinx Zynq system on a chip and an FPGA-based network interface card called the NetFPGA. Results are presented both from microbenchmarks and a benchmark scientific application using MPI. [ABSTRACT FROM AUTHOR]
Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: The authors describe their architecture and implementation for offloading collective operations to programmable logic in the communication substrate. Collective operations are widely used in parallel processing. Their design and implementation strategies affect the performance of many high-performance computing applications that utilize them. Collectives are central to the message passing interface (MPI) programming model. The programmable logic provided by field-programmable gate arrays (FPGAs) is a powerful option for creating task-specific logic to aid applications. The authors’ approach is applicable in scenarios where there is programmable logic in the communication pipeline and can be used to accelerate various network-based operations. In this article, the authors present a general collective offloading framework for use in applications using MPI. They evaluate their approach on the Xilinx Zynq system on a chip and an FPGA-based network interface card called the NetFPGA. Results are presented both from microbenchmarks and a benchmark scientific application using MPI. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1109/MM.2017.3711654
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        Text: English
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      – SubjectFull: Message passing (Computer science)
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              M: 09
              Text: Sep/Oct2017
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