BTI mitigation by anti-ageing software patterns.
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| Title: | BTI mitigation by anti-ageing software patterns. |
|---|---|
| Authors: | Abbas, Haider Muhi1, Halak, Basel1, Zwolinski, Mark1 |
| Source: | Microelectronics Reliability. Dec2017, Vol. 79, p79-90. 12p. |
| Subjects: | Temperature, Deterioration of materials, Computer software, Instruction set architecture, Integrated circuits |
| Abstract: | This paper presents a time-redundant technique to mitigate Negative and Positive Bias Temperature Instability (NBTI/PBTI) ageing effects on the functional units of a processor. We have analysed the sources and effects of ageing from the device level to the Instruction Set Architecture (ISA) level, and have found that an application may stress the critical paths in such a way that the circuit has half of its nodes always NBTI-stressed. To mitigate this behaviour, we propose an application-level solution to balance the stress and put the timing-critical gates of the critical path into a relaxed (balanced) mode. The results show that the lifetime of the system can be doubled by applying balanced stress patterns at the software level during the idle time of a processor system. [ABSTRACT FROM AUTHOR] |
| Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 126296580 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: BTI mitigation by anti-ageing software patterns. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Abbas%2C+Haider+Muhi%22">Abbas, Haider Muhi</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Halak%2C+Basel%22">Halak, Basel</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Zwolinski%2C+Mark%22">Zwolinski, Mark</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Microelectronics+Reliability%22">Microelectronics Reliability</searchLink>. Dec2017, Vol. 79, p79-90. 12p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Temperature%22">Temperature</searchLink><br /><searchLink fieldCode="DE" term="%22Deterioration+of+materials%22">Deterioration of materials</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+software%22">Computer software</searchLink><br /><searchLink fieldCode="DE" term="%22Instruction+set+architecture%22">Instruction set architecture</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: This paper presents a time-redundant technique to mitigate Negative and Positive Bias Temperature Instability (NBTI/PBTI) ageing effects on the functional units of a processor. We have analysed the sources and effects of ageing from the device level to the Instruction Set Architecture (ISA) level, and have found that an application may stress the critical paths in such a way that the circuit has half of its nodes always NBTI-stressed. To mitigate this behaviour, we propose an application-level solution to balance the stress and put the timing-critical gates of the critical path into a relaxed (balanced) mode. The results show that the lifetime of the system can be doubled by applying balanced stress patterns at the software level during the idle time of a processor system. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1016/j.microrel.2017.10.009 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 12 StartPage: 79 Subjects: – SubjectFull: Temperature Type: general – SubjectFull: Deterioration of materials Type: general – SubjectFull: Computer software Type: general – SubjectFull: Instruction set architecture Type: general – SubjectFull: Integrated circuits Type: general Titles: – TitleFull: BTI mitigation by anti-ageing software patterns. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Abbas, Haider Muhi – PersonEntity: Name: NameFull: Halak, Basel – PersonEntity: Name: NameFull: Zwolinski, Mark IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 12 Text: Dec2017 Type: published Y: 2017 Identifiers: – Type: issn-print Value: 00262714 Numbering: – Type: volume Value: 79 Titles: – TitleFull: Microelectronics Reliability Type: main |
| ResultId | 1 |
