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Investigation of BTI characteristics and its behavior on 10 nm SRAM with high-k/metal gate FinFET technology having multi-VT gate stack.

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Title: Investigation of BTI characteristics and its behavior on 10 nm SRAM with high-k/metal gate FinFET technology having multi-VT gate stack.
Authors: Jin, Minjung1 minjung.jin@samsung.com, Kim, Kangjung1, Kim, Yoohwan1, Shim, Hyewon1, Kim, Jinju1, Kim, Gunrae1, Pae, Sangwoo1
Source: Microelectronics Reliability. Feb2018, Vol. 81, p201-209. 9p.
Subjects: Static random access memory chips, Integrated memory circuits, Transistors, Gallium nitride, Cyclic loads
Abstract: Bias-Temperature Instability (BTI) is one of the key device reliability concerns for both digital and analog circuit operations. Features of work-function metal (WFM) for V T modulation in 10 nm FinFET process technology results in WFM dependent BTI characteristics. Similar levels of aging degradation to those of previous 14 nm technology were observed in both DC and AC operations. As BTI-induced V T variability is expected to increase with 3D fin dimension scaling, such variability must be accurately characterized and considered for circuit designs. This paper reports the impact of transistor- level BTI degradation on circuits by studying Ring Oscillator (RO) and SRAM. The SRAM cell stabilities in terms of SNM (Static Noise Margin) and WRM (Write Margin) were further studied through SRAM HTOL stresses by characterizing V min shift. Robust 10 nm SRAM and product level HTOL reliability up to 500 h were demonstrated. [ABSTRACT FROM AUTHOR]
Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
An: 127843757
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PubTypeId: academicJournal
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  Label: Title
  Group: Ti
  Data: Investigation of BTI characteristics and its behavior on 10 nm SRAM with high-k/metal gate FinFET technology having multi-VT gate stack.
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  Data: <searchLink fieldCode="AR" term="%22Jin%2C+Minjung%22">Jin, Minjung</searchLink><relatesTo>1</relatesTo><i> minjung.jin@samsung.com</i><br /><searchLink fieldCode="AR" term="%22Kim%2C+Kangjung%22">Kim, Kangjung</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Kim%2C+Yoohwan%22">Kim, Yoohwan</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Shim%2C+Hyewon%22">Shim, Hyewon</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Kim%2C+Jinju%22">Kim, Jinju</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Kim%2C+Gunrae%22">Kim, Gunrae</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Pae%2C+Sangwoo%22">Pae, Sangwoo</searchLink><relatesTo>1</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22Microelectronics+Reliability%22">Microelectronics Reliability</searchLink>. Feb2018, Vol. 81, p201-209. 9p.
– Name: Subject
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  Data: <searchLink fieldCode="DE" term="%22Static+random+access+memory+chips%22">Static random access memory chips</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+memory+circuits%22">Integrated memory circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Gallium+nitride%22">Gallium nitride</searchLink><br /><searchLink fieldCode="DE" term="%22Cyclic+loads%22">Cyclic loads</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Bias-Temperature Instability (BTI) is one of the key device reliability concerns for both digital and analog circuit operations. Features of work-function metal (WFM) for V T modulation in 10 nm FinFET process technology results in WFM dependent BTI characteristics. Similar levels of aging degradation to those of previous 14 nm technology were observed in both DC and AC operations. As BTI-induced V T variability is expected to increase with 3D fin dimension scaling, such variability must be accurately characterized and considered for circuit designs. This paper reports the impact of transistor- level BTI degradation on circuits by studying Ring Oscillator (RO) and SRAM. The SRAM cell stabilities in terms of SNM (Static Noise Margin) and WRM (Write Margin) were further studied through SRAM HTOL stresses by characterizing V min shift. Robust 10 nm SRAM and product level HTOL reliability up to 500 h were demonstrated. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1016/j.microrel.2017.12.014
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      – Code: eng
        Text: English
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        PageCount: 9
        StartPage: 201
    Subjects:
      – SubjectFull: Static random access memory chips
        Type: general
      – SubjectFull: Integrated memory circuits
        Type: general
      – SubjectFull: Transistors
        Type: general
      – SubjectFull: Gallium nitride
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      – SubjectFull: Cyclic loads
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      – TitleFull: Investigation of BTI characteristics and its behavior on 10 nm SRAM with high-k/metal gate FinFET technology having multi-VT gate stack.
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            NameFull: Kim, Jinju
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              Text: Feb2018
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              Y: 2018
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              Value: 81
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