Prakash, A., Clarke, C. T., Lam, S., & Srikanthan, T. (2018). Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26(3), 445. https://doi.org/10.1109/TVLSI.2017.2769125
Chicago Style (17th ed.) CitationPrakash, Alok, Christopher T. Clarke, Siew-Kei Lam, and Thambipillai Srikanthan. "Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26, no. 3 (2018): 445. https://doi.org/10.1109/TVLSI.2017.2769125.
MLA (9th ed.) CitationPrakash, Alok, et al. "Rapid Memory-Aware Selection of Hardware Accelerators in Programmable SoC Design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 3, 2018, p. 445, https://doi.org/10.1109/TVLSI.2017.2769125.