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Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree.

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Title: Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree.
Authors: Chen, Li1, Chen, Mo1, Wang, Haibin1, Liu, Rui1, Chen, Qingyu1, Li, Yuanqing1,2, Krstic, Milos2,3, Nofal, Issam4, Shi, Shuting5, Guo, Gang5, Baeg, Sang H.6, Wen, Shi-Jie7, Wong, Richard7
Source: Microelectronics Reliability. Aug2018, Vol. 87, p24-32. 9p.
Subjects: Soft errors, Clock distribution networks, Electric inverters, Integrated circuits, Simulation methods & models
Abstract: The soft error rate (SER) due to heavy-ion irradiation of a clock tree is investigated in this paper. A method for clock tree SER prediction is developed, which employs a dedicated soft error analysis tool to characterize the single-event transient (SET) sensitivities of clock inverters and other commercial tools to calculate the SER through fault-injection simulations. A test circuit including a flip-flop chain and clock tree in a 65 nm CMOS technology is developed through the automatic ASIC design flow. This circuit is analyzed with the developed method to calculate its clock tree SER. In addition, this circuit is implemented in a 65 nm test chip and irradiated by heavy ions to measure its SER resulting from the SETs in the clock tree. The experimental and calculation results of this case study present good correlation, which verifies the effectiveness of the developed method. [ABSTRACT FROM AUTHOR]
Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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Header DbId: egs
DbLabel: Engineering Source
An: 130952112
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
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  Data: Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree.
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  Data: <searchLink fieldCode="JN" term="%22Microelectronics+Reliability%22">Microelectronics Reliability</searchLink>. Aug2018, Vol. 87, p24-32. 9p.
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  Data: <searchLink fieldCode="DE" term="%22Soft+errors%22">Soft errors</searchLink><br /><searchLink fieldCode="DE" term="%22Clock+distribution+networks%22">Clock distribution networks</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+inverters%22">Electric inverters</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Simulation+methods+%26+models%22">Simulation methods & models</searchLink>
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  Data: The soft error rate (SER) due to heavy-ion irradiation of a clock tree is investigated in this paper. A method for clock tree SER prediction is developed, which employs a dedicated soft error analysis tool to characterize the single-event transient (SET) sensitivities of clock inverters and other commercial tools to calculate the SER through fault-injection simulations. A test circuit including a flip-flop chain and clock tree in a 65 nm CMOS technology is developed through the automatic ASIC design flow. This circuit is analyzed with the developed method to calculate its clock tree SER. In addition, this circuit is implemented in a 65 nm test chip and irradiated by heavy ions to measure its SER resulting from the SETs in the clock tree. The experimental and calculation results of this case study present good correlation, which verifies the effectiveness of the developed method. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Microelectronics Reliability is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1016/j.microrel.2018.05.016
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        Text: English
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        PageCount: 9
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    Subjects:
      – SubjectFull: Soft errors
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      – SubjectFull: Clock distribution networks
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      – SubjectFull: Electric inverters
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      – SubjectFull: Integrated circuits
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      – SubjectFull: Simulation methods & models
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              Text: Aug2018
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