HistLock+: Precise Memory Access Maintenance Without Lockset Comparison for Complete Hybrid Data Race Detection.
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| Title: | HistLock+: Precise Memory Access Maintenance Without Lockset Comparison for Complete Hybrid Data Race Detection. |
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| Authors: | Yang, Jialin, Jiang, Bo, Chan, W. K. |
| Source: | IEEE Transactions on Reliability. Sep2018, Vol. 67 Issue 3, p786-801. 16p. |
| Subjects: | Computer network access control software, Synchronization, Parsec, Memory testing, Concurrent error detection |
| Abstract: | Dynamic hybrid data race detectors alleviate the detection imprecision problem incurred by pure lockset-based race detectors and the thread interleaving sensitive problem incurred by pure happens-before race detectors. Nonetheless, to ensure at least one data race on every memory location to be detected, keeping all historical memory access events in the analysis state of such a detector is impractical. Existing complete hybrid race detectors perform extensive comparisons among the locksets of the memory accesses on each memory location to identify which of them to be retained in its analysis state, which incurs significant runtime overhead. In this paper, we investigate to what extent a complete hybrid data race detector able to perform such identifications without lockset comparison. We present HistLock+, which is built atop thread epoch and lock release events to infer whether two memory accesses on the same memory location from the same thread in between consecutive lock release operations have any lock subset relation without performing expensive lockset comparison. HistLock+ guarantees exactly one racy memory access event to be reported on each thread segment separated by lock releases and hard-order thread synchronizations, and it never reports false positive on lockset violation. We have validated HistLock+ using the PARSEC benchmark suite and four real-world applications. The experimental results showed that HistLock+ was 122% faster and 28% more memory-efficient than the previous state-of-the-art complete hybrid race detector. Moreover, HistLock+ achieved the highest effectiveness in race detection among all evaluated race detectors in our experiment. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Reliability is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 131557442 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: HistLock+: Precise Memory Access Maintenance Without Lockset Comparison for Complete Hybrid Data Race Detection. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Yang%2C+Jialin%22">Yang, Jialin</searchLink><br /><searchLink fieldCode="AR" term="%22Jiang%2C+Bo%22">Jiang, Bo</searchLink><br /><searchLink fieldCode="AR" term="%22Chan%2C+W%2E+K%2E%22">Chan, W. K.</searchLink> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Reliability%22">IEEE Transactions on Reliability</searchLink>. Sep2018, Vol. 67 Issue 3, p786-801. 16p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Computer+network+access+control+software%22">Computer network access control software</searchLink><br /><searchLink fieldCode="DE" term="%22Synchronization%22">Synchronization</searchLink><br /><searchLink fieldCode="DE" term="%22Parsec%22">Parsec</searchLink><br /><searchLink fieldCode="DE" term="%22Memory+testing%22">Memory testing</searchLink><br /><searchLink fieldCode="DE" term="%22Concurrent+error+detection%22">Concurrent error detection</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Dynamic hybrid data race detectors alleviate the detection imprecision problem incurred by pure lockset-based race detectors and the thread interleaving sensitive problem incurred by pure happens-before race detectors. Nonetheless, to ensure at least one data race on every memory location to be detected, keeping all historical memory access events in the analysis state of such a detector is impractical. Existing complete hybrid race detectors perform extensive comparisons among the locksets of the memory accesses on each memory location to identify which of them to be retained in its analysis state, which incurs significant runtime overhead. In this paper, we investigate to what extent a complete hybrid data race detector able to perform such identifications without lockset comparison. We present HistLock+, which is built atop thread epoch and lock release events to infer whether two memory accesses on the same memory location from the same thread in between consecutive lock release operations have any lock subset relation without performing expensive lockset comparison. HistLock+ guarantees exactly one racy memory access event to be reported on each thread segment separated by lock releases and hard-order thread synchronizations, and it never reports false positive on lockset violation. We have validated HistLock+ using the PARSEC benchmark suite and four real-world applications. The experimental results showed that HistLock+ was 122% faster and 28% more memory-efficient than the previous state-of-the-art complete hybrid race detector. Moreover, HistLock+ achieved the highest effectiveness in race detection among all evaluated race detectors in our experiment. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Reliability is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TR.2018.2832226 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 16 StartPage: 786 Subjects: – SubjectFull: Computer network access control software Type: general – SubjectFull: Synchronization Type: general – SubjectFull: Parsec Type: general – SubjectFull: Memory testing Type: general – SubjectFull: Concurrent error detection Type: general Titles: – TitleFull: HistLock+: Precise Memory Access Maintenance Without Lockset Comparison for Complete Hybrid Data Race Detection. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Yang, Jialin – PersonEntity: Name: NameFull: Jiang, Bo – PersonEntity: Name: NameFull: Chan, W. K. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 09 Text: Sep2018 Type: published Y: 2018 Identifiers: – Type: issn-print Value: 00189529 Numbering: – Type: volume Value: 67 – Type: issue Value: 3 Titles: – TitleFull: IEEE Transactions on Reliability Type: main |
| ResultId | 1 |
