Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications.
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| Title: | Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications. |
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| Authors: | Pashaeifar, Masoud, Kamal, Mehdi, Afzali-Kusha, Ali, Pedram, Massoud |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Nov2018, Vol. 26 Issue 11, p2530-2541. 12p. |
| Subjects: | Adders (Digital electronics), Digital signal processing, Electric power consumption, Discrete cosine transforms, Finite impulse response filters |
| Abstract: | In this paper, a reverse carry propagate adder (RCPA) is presented. In the RCPA structure, the carry signal propagates in a counter-flow manner from the most significant bit to the least significant bit; hence, the carry input signal has higher significance than the output carry. This method of carry propagation leads to higher stability in the presence of delay variations. Three implementations of the reverse carry propagate full-adder (RCPFA) cell with different delay, power, energy, and accuracy levels are introduced. The proposed structure may be combined with an exact (forward) carry adder to form hybrid adders with tunable levels of accuracy. The design parameters of the proposed RCPA implementations and some hybrid adders realized utilizing these structures are studied and compared with those of the state-of-the-art approximate adders using HSPICE simulations in a 45-nm CMOS technology. The results indicate that employing the proposed RCPAs in the hybrid adders may provide, on average, 27%, 6%, and 31% improvements in delay, energy, and energy-delay-product while providing higher levels of accuracy. In addition, the structure is more resilient to delay variation compared to the conventional approximate adder. Finally, the efficacy of the proposed RCPAs is investigated in the discrete cosine transform (DCT) block of the JPEG compression and finite-impulse response (FIR) filter applications. The investigation reveals 60% and 39% energy saving in the DCT of JPEG and FIR filter, respectively, for the proposed RCPAs. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Items | – Name: Title Label: Title Group: Ti Data: Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Pashaeifar%2C+Masoud%22">Pashaeifar, Masoud</searchLink><br /><searchLink fieldCode="AR" term="%22Kamal%2C+Mehdi%22">Kamal, Mehdi</searchLink><br /><searchLink fieldCode="AR" term="%22Afzali-Kusha%2C+Ali%22">Afzali-Kusha, Ali</searchLink><br /><searchLink fieldCode="AR" term="%22Pedram%2C+Massoud%22">Pedram, Massoud</searchLink> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Nov2018, Vol. 26 Issue 11, p2530-2541. 12p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Adders+%28Digital+electronics%29%22">Adders (Digital electronics)</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+signal+processing%22">Digital signal processing</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+power+consumption%22">Electric power consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Discrete+cosine+transforms%22">Discrete cosine transforms</searchLink><br /><searchLink fieldCode="DE" term="%22Finite+impulse+response+filters%22">Finite impulse response filters</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In this paper, a reverse carry propagate adder (RCPA) is presented. In the RCPA structure, the carry signal propagates in a counter-flow manner from the most significant bit to the least significant bit; hence, the carry input signal has higher significance than the output carry. This method of carry propagation leads to higher stability in the presence of delay variations. Three implementations of the reverse carry propagate full-adder (RCPFA) cell with different delay, power, energy, and accuracy levels are introduced. The proposed structure may be combined with an exact (forward) carry adder to form hybrid adders with tunable levels of accuracy. The design parameters of the proposed RCPA implementations and some hybrid adders realized utilizing these structures are studied and compared with those of the state-of-the-art approximate adders using HSPICE simulations in a 45-nm CMOS technology. The results indicate that employing the proposed RCPAs in the hybrid adders may provide, on average, 27%, 6%, and 31% improvements in delay, energy, and energy-delay-product while providing higher levels of accuracy. In addition, the structure is more resilient to delay variation compared to the conventional approximate adder. Finally, the efficacy of the proposed RCPAs is investigated in the discrete cosine transform (DCT) block of the JPEG compression and finite-impulse response (FIR) filter applications. The investigation reveals 60% and 39% energy saving in the DCT of JPEG and FIR filter, respectively, for the proposed RCPAs. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TVLSI.2018.2859939 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 12 StartPage: 2530 Subjects: – SubjectFull: Adders (Digital electronics) Type: general – SubjectFull: Digital signal processing Type: general – SubjectFull: Electric power consumption Type: general – SubjectFull: Discrete cosine transforms Type: general – SubjectFull: Finite impulse response filters Type: general Titles: – TitleFull: Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Pashaeifar, Masoud – PersonEntity: Name: NameFull: Kamal, Mehdi – PersonEntity: Name: NameFull: Afzali-Kusha, Ali – PersonEntity: Name: NameFull: Pedram, Massoud IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 11 Text: Nov2018 Type: published Y: 2018 Identifiers: – Type: issn-print Value: 10638210 Numbering: – Type: volume Value: 26 – Type: issue Value: 11 Titles: – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems Type: main |
| ResultId | 1 |
