Transparent Memory: A Hardware Solution to the Memory Conflict Problem.

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Bibliographic Details
Title: Transparent Memory: A Hardware Solution to the Memory Conflict Problem.
Authors: Hisano, Takumi1
Source: Systems & Computers in Japan. Nov86, Vol. 17 Issue 11, p100-108. 9p.
Subjects: Ferroelectric RAM, Read-only memory, Simulation methods & models, Performance evaluation, Multiprocessors, Microprocessors
Abstract: The paper proposes a memory organization aiming at reduction of memory conflict produced by the multiple access. The proposed memory organization has the effect of suppressing not only the memory conflicts but also the write memory conflicts. The conflict of read access is suppressed by using more than one memory module of the same content, and the conflict of write access is suppressed by restricting the write area and using the distributed communication mechanism. It is shown by the performance evaluation simulation that the memory conflict is sufficiently small compared with the number of multiple read memory and approaches a constant with the increase of the number of processors n. The hardware complexity is relatively large. The physical memory is n times compared with the logical address space and the number of memory control circuits is n². There is one connection between the memory control circuit and the connection network. By specifying the area of applications and simplifying the connection configuration, the hardware complexity can be reduced. [ABSTRACT FROM AUTHOR]
Copyright of Systems & Computers in Japan is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
An: 14048346
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PubType: Academic Journal
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  Label: Title
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  Data: Transparent Memory: A Hardware Solution to the Memory Conflict Problem.
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  Data: <searchLink fieldCode="AR" term="%22Hisano%2C+Takumi%22">Hisano, Takumi</searchLink><relatesTo>1</relatesTo>
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  Data: <searchLink fieldCode="JN" term="%22Systems+%26+Computers+in+Japan%22">Systems & Computers in Japan</searchLink>. Nov86, Vol. 17 Issue 11, p100-108. 9p.
– Name: Subject
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  Data: <searchLink fieldCode="DE" term="%22Ferroelectric+RAM%22">Ferroelectric RAM</searchLink><br /><searchLink fieldCode="DE" term="%22Read-only+memory%22">Read-only memory</searchLink><br /><searchLink fieldCode="DE" term="%22Simulation+methods+%26+models%22">Simulation methods & models</searchLink><br /><searchLink fieldCode="DE" term="%22Performance+evaluation%22">Performance evaluation</searchLink><br /><searchLink fieldCode="DE" term="%22Multiprocessors%22">Multiprocessors</searchLink><br /><searchLink fieldCode="DE" term="%22Microprocessors%22">Microprocessors</searchLink>
– Name: Abstract
  Label: Abstract
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  Data: The paper proposes a memory organization aiming at reduction of memory conflict produced by the multiple access. The proposed memory organization has the effect of suppressing not only the memory conflicts but also the write memory conflicts. The conflict of read access is suppressed by using more than one memory module of the same content, and the conflict of write access is suppressed by restricting the write area and using the distributed communication mechanism. It is shown by the performance evaluation simulation that the memory conflict is sufficiently small compared with the number of multiple read memory and approaches a constant with the increase of the number of processors n. The hardware complexity is relatively large. The physical memory is n times compared with the logical address space and the number of memory control circuits is n². There is one connection between the memory control circuit and the connection network. By specifying the area of applications and simplifying the connection configuration, the hardware complexity can be reduced. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Systems & Computers in Japan is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
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    Identifiers:
      – Type: doi
        Value: 10.1002/scj.4690171110
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      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 9
        StartPage: 100
    Subjects:
      – SubjectFull: Ferroelectric RAM
        Type: general
      – SubjectFull: Read-only memory
        Type: general
      – SubjectFull: Simulation methods & models
        Type: general
      – SubjectFull: Performance evaluation
        Type: general
      – SubjectFull: Multiprocessors
        Type: general
      – SubjectFull: Microprocessors
        Type: general
    Titles:
      – TitleFull: Transparent Memory: A Hardware Solution to the Memory Conflict Problem.
        Type: main
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          Name:
            NameFull: Hisano, Takumi
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          Dates:
            – D: 01
              M: 11
              Text: Nov86
              Type: published
              Y: 1986
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              Value: 08821666
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              Value: 17
            – Type: issue
              Value: 11
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            – TitleFull: Systems & Computers in Japan
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