Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction.

Saved in:
Bibliographic Details
Title: Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction.
Authors: Sharma, Suruchi1 (AUTHOR) sharma.suru91@gmail.com, Kaur, Baljit1 (AUTHOR)
Source: IET Circuits, Devices & Systems (Wiley-Blackwell). Aug2020, Vol. 14 Issue 5, p695-701. 7p.
Abstract: Tunnel field effect transistors (TFETs) have been exhibiting an enticing performance to succeed in metal–oxide–semiconductor technology. However, TFET also possesses several challenges such as low drive current, ambipolarity, and requirement of abrupt doping profiles for the occurrence of band‐to‐band tunnelling (BTBT) conduction mechanism at the junction. To overcome these challenges, the authors propose a heterojunction doping less tunnel field‐effect transistor with an asymmetric double gate (HJ ADG DLTFET). This device employs a low bandgap material at the source region, which increases the BTBT rate at the channel–source interface leading to enhanced drive current while maintaining low off‐current. Consequently, an increment of one order for ION (∼1.5 × 10−5 A/µm) compared to the conventional ADG DLTFET has been provided by this device. Additionally, the comparative analysis of the proposed device and conventional one has been performed to reveal the advantages of the proposed structure in terms of transfer characteristics, transconductance, gate‐to‐drain capacitance, cut‐off frequency, gain–bandwidth product, device efficiency, and transconductance frequency product. Moreover, the effect of gate length and drain voltage variations has been analysed for HJ ADG DLTFET concerning the aforementioned characteristics. [ABSTRACT FROM AUTHOR]
Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
FullText Text:
  Availability: 0
Header DbId: egs
DbLabel: Engineering Source
An: 148144538
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Sharma%2C+Suruchi%22">Sharma, Suruchi</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> sharma.suru91@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Kaur%2C+Baljit%22">Kaur, Baljit</searchLink><relatesTo>1</relatesTo> (AUTHOR)
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22IET+Circuits%2C+Devices+%26+Systems+%28Wiley-Blackwell%29%22">IET Circuits, Devices & Systems (Wiley-Blackwell)</searchLink>. Aug2020, Vol. 14 Issue 5, p695-701. 7p.
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Tunnel field effect transistors (TFETs) have been exhibiting an enticing performance to succeed in metal–oxide–semiconductor technology. However, TFET also possesses several challenges such as low drive current, ambipolarity, and requirement of abrupt doping profiles for the occurrence of band‐to‐band tunnelling (BTBT) conduction mechanism at the junction. To overcome these challenges, the authors propose a heterojunction doping less tunnel field‐effect transistor with an asymmetric double gate (HJ ADG DLTFET). This device employs a low bandgap material at the source region, which increases the BTBT rate at the channel–source interface leading to enhanced drive current while maintaining low off‐current. Consequently, an increment of one order for ION (∼1.5 × 10−5 A/µm) compared to the conventional ADG DLTFET has been provided by this device. Additionally, the comparative analysis of the proposed device and conventional one has been performed to reveal the advantages of the proposed structure in terms of transfer characteristics, transconductance, gate‐to‐drain capacitance, cut‐off frequency, gain–bandwidth product, device efficiency, and transconductance frequency product. Moreover, the effect of gate length and drain voltage variations has been analysed for HJ ADG DLTFET concerning the aforementioned characteristics. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=148144538
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1049/iet-cds.2019.0290
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 7
        StartPage: 695
    Titles:
      – TitleFull: Performance investigation of asymmetric double‐gate doping less tunnel FET with Si/Ge heterojunction.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Sharma, Suruchi
      – PersonEntity:
          Name:
            NameFull: Kaur, Baljit
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 08
              Text: Aug2020
              Type: published
              Y: 2020
          Identifiers:
            – Type: issn-print
              Value: 1751858X
          Numbering:
            – Type: volume
              Value: 14
            – Type: issue
              Value: 5
          Titles:
            – TitleFull: IET Circuits, Devices & Systems (Wiley-Blackwell)
              Type: main
ResultId 1