Course on secure hardware design of silicon chips.
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| Title: | Course on secure hardware design of silicon chips. |
|---|---|
| Authors: | Halak, Basel1,2 (AUTHOR) bh9@ecs.soton.ac.uk |
| Source: | IET Circuits, Devices & Systems (Wiley-Blackwell). Jul2017, Vol. 11 Issue 4, p304-309. 6p. |
| Abstract: | This study describes the design and evaluation of a secure chip design module for graduate students and junior engineers with electronics and computer engineering. This course has two broad goals, the first is to teach students how design complex systems on chips using industry standard tools and the second is to educate them on emerging hardware security threats and countermeasures. There are a number of strategies currently been employed to handle the rising complexity of chip design, namely reuse, abstraction and automation. The authors aim to show how to employ these approaches to produce working systems within a time‐constrained environment similar to that of IC design companies. One of the unique features of this module is its approach of treating hardware security as an integral part of the chip design process and as one of the design metrics which can be evaluated and optimised, this allows students to better understand the root causes of this issue and to think more constructively about potential countermeasures. The course is designed based on the principles of constructive alignment method and Kolb learning cycle. Detailed syllabus and assessment exercises are included. Feedback results from students' surveys indicate that the module has been positively received. [ABSTRACT FROM AUTHOR] |
| Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 148145289 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Course on secure hardware design of silicon chips. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Halak%2C+Basel%22">Halak, Basel</searchLink><relatesTo>1,2</relatesTo> (AUTHOR)<i> bh9@ecs.soton.ac.uk</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IET+Circuits%2C+Devices+%26+Systems+%28Wiley-Blackwell%29%22">IET Circuits, Devices & Systems (Wiley-Blackwell)</searchLink>. Jul2017, Vol. 11 Issue 4, p304-309. 6p. – Name: Abstract Label: Abstract Group: Ab Data: This study describes the design and evaluation of a secure chip design module for graduate students and junior engineers with electronics and computer engineering. This course has two broad goals, the first is to teach students how design complex systems on chips using industry standard tools and the second is to educate them on emerging hardware security threats and countermeasures. There are a number of strategies currently been employed to handle the rising complexity of chip design, namely reuse, abstraction and automation. The authors aim to show how to employ these approaches to produce working systems within a time‐constrained environment similar to that of IC design companies. One of the unique features of this module is its approach of treating hardware security as an integral part of the chip design process and as one of the design metrics which can be evaluated and optimised, this allows students to better understand the root causes of this issue and to think more constructively about potential countermeasures. The course is designed based on the principles of constructive alignment method and Kolb learning cycle. Detailed syllabus and assessment exercises are included. Feedback results from students' surveys indicate that the module has been positively received. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=148145289 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1049/iet-cds.2017.0028 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 6 StartPage: 304 Titles: – TitleFull: Course on secure hardware design of silicon chips. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Halak, Basel IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: Jul2017 Type: published Y: 2017 Identifiers: – Type: issn-print Value: 1751858X Numbering: – Type: volume Value: 11 – Type: issue Value: 4 Titles: – TitleFull: IET Circuits, Devices & Systems (Wiley-Blackwell) Type: main |
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