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On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications.

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Title: On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications.
Authors: Humood, Khaled1 (AUTHOR), Mohammad, Baker1 (AUTHOR) baker.mohammad@ku.ac.ae, Abunahla, Heba1 (AUTHOR), Azzam, Anas2 (AUTHOR)
Source: IET Circuits, Devices & Systems (Wiley-Blackwell). Jan2020, Vol. 14 Issue 1, p107-114. 8p.
Abstract: This study presents a novel hybrid memristor (MR)‐complementary metal–oxide–semiconductor‐based flash analogue‐to‐digital converter (ADC). The speed and efficiency of the ADC are important aspects that can significantly affect the overall system performance. The flash ADC is considered the fastest type of ADCs; however, its performance is affected by the resistor mismatch. The proposed flash ADC is the first to use tunable MR to replace conventional resistor to generate accurate reference voltages. This is achieved by utilising the highly analogue behaviour observed in multi‐state MR devices fabricated and tested by the authors' group. The electrical parameters of the devices have been extracted by device characterisation, then the voltage‐threshold adaptive model (VTEAM) has been used to develop a correlated mathematical and Simulation Program with Integrated Circuit Emphasis (SPICE) device model. The proposed MR‐based flash‐ADC design solves the issue of resistor mismatch that results in encoding errors by the ability to tune the MR resistance value post‐processing. Moreover, being a nanoscale component, the usage of MR significantly improves the area efficiency of the target ADC. Furthermore, the proposed design has improved the ADC transfer function characteristic and has lower differential non‐linearity and integral non‐linearity errors compared with the conventional design. [ABSTRACT FROM AUTHOR]
Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications.
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  Data: <searchLink fieldCode="AR" term="%22Humood%2C+Khaled%22">Humood, Khaled</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Mohammad%2C+Baker%22">Mohammad, Baker</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> baker.mohammad@ku.ac.ae</i><br /><searchLink fieldCode="AR" term="%22Abunahla%2C+Heba%22">Abunahla, Heba</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Azzam%2C+Anas%22">Azzam, Anas</searchLink><relatesTo>2</relatesTo> (AUTHOR)
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– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: This study presents a novel hybrid memristor (MR)‐complementary metal–oxide–semiconductor‐based flash analogue‐to‐digital converter (ADC). The speed and efficiency of the ADC are important aspects that can significantly affect the overall system performance. The flash ADC is considered the fastest type of ADCs; however, its performance is affected by the resistor mismatch. The proposed flash ADC is the first to use tunable MR to replace conventional resistor to generate accurate reference voltages. This is achieved by utilising the highly analogue behaviour observed in multi‐state MR devices fabricated and tested by the authors' group. The electrical parameters of the devices have been extracted by device characterisation, then the voltage‐threshold adaptive model (VTEAM) has been used to develop a correlated mathematical and Simulation Program with Integrated Circuit Emphasis (SPICE) device model. The proposed MR‐based flash‐ADC design solves the issue of resistor mismatch that results in encoding errors by the ability to tune the MR resistance value post‐processing. Moreover, being a nanoscale component, the usage of MR significantly improves the area efficiency of the target ADC. Furthermore, the proposed design has improved the ADC transfer function characteristic and has lower differential non‐linearity and integral non‐linearity errors compared with the conventional design. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of IET Circuits, Devices & Systems (Wiley-Blackwell) is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.1049/iet-cds.2019.0293
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      – Code: eng
        Text: English
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        PageCount: 8
        StartPage: 107
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      – TitleFull: On‐chip tunable Memristor‐based flash‐ADC converter for artificial intelligence applications.
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            NameFull: Humood, Khaled
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            NameFull: Mohammad, Baker
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            NameFull: Abunahla, Heba
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            NameFull: Azzam, Anas
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              Text: Jan2020
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              Y: 2020
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              Value: 14
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