OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems.
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| Title: | OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems. |
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| Authors: | Yarmand, Roohollah1 (AUTHOR) ryarmand@ut.ac.ir, Kamal, Mehdi1 (AUTHOR) mehdikamal@ut.ac.ir, Afzali-Kusha, Ali1 (AUTHOR) afzali@ut.ac.ir, Esmaeli, Pooria1 (AUTHOR) p.esmaelli@ut.ac.ir, Pedram, Massoud2 (AUTHOR) pedram@usc.edu |
| Source: | IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Feb2021, Vol. 29 Issue 2, p434-446. 13p. |
| Subjects: | Cache memory, Multicore processors, Heuristic algorithms, Energy consumption, Multiprocessors |
| Abstract: | In this article, we present an approach for adjusting the approximation levels of the cache memories in the memory hierarchy of an approximate processing system. The technique, which is called online management of cache approximation level (OPTIMA), adjusts the approximation levels of the caches under a predefined accuracy constraint. OPTIMA may also be employed for multicore processors, which comprise cores with private and shared caches running applications with different error constraints. To reduce the energy consumption, OPTIMA determines the proper approximation level of each cache memory using heuristic algorithms in two main steps. In the first step, the approximate levels are adjusted to maximize the power efficiency by dropping the application accuracy to a level that still meets a desirable minimum output quality. In the second step, output accuracy variations due to input pattern changes are compensated by fine tuning. We suggest two algorithms (with different adjustment speeds of approximate levels) for the first step and another algorithm for the second step. To assess the efficacy of OPTIMA, we integrate it in the gem5 simulator and simulate some multiprocessor configurations by running eight approximate benchmarks. The results show that the proposed approach provides up to 44% power consumption reduction in the memory hierarchy. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 148380556 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Yarmand%2C+Roohollah%22">Yarmand, Roohollah</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> ryarmand@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Kamal%2C+Mehdi%22">Kamal, Mehdi</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> mehdikamal@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Afzali-Kusha%2C+Ali%22">Afzali-Kusha, Ali</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> afzali@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Esmaeli%2C+Pooria%22">Esmaeli, Pooria</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> p.esmaelli@ut.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Pedram%2C+Massoud%22">Pedram, Massoud</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> pedram@usc.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Very+Large+Scale+Integration+%28VLSI%29+Systems%22">IEEE Transactions on Very Large Scale Integration (VLSI) Systems</searchLink>. Feb2021, Vol. 29 Issue 2, p434-446. 13p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Cache+memory%22">Cache memory</searchLink><br /><searchLink fieldCode="DE" term="%22Multicore+processors%22">Multicore processors</searchLink><br /><searchLink fieldCode="DE" term="%22Heuristic+algorithms%22">Heuristic algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Energy+consumption%22">Energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Multiprocessors%22">Multiprocessors</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In this article, we present an approach for adjusting the approximation levels of the cache memories in the memory hierarchy of an approximate processing system. The technique, which is called online management of cache approximation level (OPTIMA), adjusts the approximation levels of the caches under a predefined accuracy constraint. OPTIMA may also be employed for multicore processors, which comprise cores with private and shared caches running applications with different error constraints. To reduce the energy consumption, OPTIMA determines the proper approximation level of each cache memory using heuristic algorithms in two main steps. In the first step, the approximate levels are adjusted to maximize the power efficiency by dropping the application accuracy to a level that still meets a desirable minimum output quality. In the second step, output accuracy variations due to input pattern changes are compensated by fine tuning. We suggest two algorithms (with different adjustment speeds of approximate levels) for the first step and another algorithm for the second step. To assess the efficacy of OPTIMA, we integrate it in the gem5 simulator and simulate some multiprocessor configurations by running eight approximate benchmarks. The results show that the proposed approach provides up to 44% power consumption reduction in the memory hierarchy. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Very Large Scale Integration (VLSI) Systems is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TVLSI.2020.3043953 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 13 StartPage: 434 Subjects: – SubjectFull: Cache memory Type: general – SubjectFull: Multicore processors Type: general – SubjectFull: Heuristic algorithms Type: general – SubjectFull: Energy consumption Type: general – SubjectFull: Multiprocessors Type: general Titles: – TitleFull: OPTIMA: An Approach for Online Management of Cache Approximation Levels in Approximate Processing Systems. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Yarmand, Roohollah – PersonEntity: Name: NameFull: Kamal, Mehdi – PersonEntity: Name: NameFull: Afzali-Kusha, Ali – PersonEntity: Name: NameFull: Esmaeli, Pooria – PersonEntity: Name: NameFull: Pedram, Massoud IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 02 Text: Feb2021 Type: published Y: 2021 Identifiers: – Type: issn-print Value: 10638210 Numbering: – Type: volume Value: 29 – Type: issue Value: 2 Titles: – TitleFull: IEEE Transactions on Very Large Scale Integration (VLSI) Systems Type: main |
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