High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency.
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| Title: | High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency. |
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| Authors: | Zhang, Bo1 (AUTHOR) zhan254@usc.edu, Cheng, Zeming1 (AUTHOR) zemingch@usc.edu, Pedram, Massoud1 (AUTHOR) pedram@usc.edu |
| Source: | IEEE Transactions on Computers. Feb2022, Vol. 71 Issue 2, p436-449. 14p. |
| Subjects: | Data compression, Elliptic curve cryptography, Multiplication |
| Abstract: | The proposed herein is a scalable high-radix (i.e., $2^m$ 2 m ) Montgomery Modular (MM) Multiplication circuit replacing the integer multiplications in each iteration of the Montgomery MM algorithm (related to the product of $m$ m bits of the multiplier and the multiplicand) with carry-save compressions and completely eliminating costly multiplications. Furthermore, the proposed Montgomery MM decomposes the multiplicand itself using a radix of $2^w$ 2 w with $w\geq 2m$ w ≥ 2 m , thereby achieving a scalable design, which can deliver an issue latency of one cycle and a cycle (count) latency of $O(N^2/(wmp))$ O (N 2 / (w m p)) where $p$ p denotes the number of available processing elements, each of which is designed to complete the above iteration by computing in part the product of $w$ w bits of the multiplicand and $m$ m bits of the multiplier. The area complexity of the proposed Montgomery MM is $O(wmp)$ O (w m p) , and thus, the Area-Latency-Product complexity is $O(N^{2})$ O (N 2) . [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Computers is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 154763633 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Zhang%2C+Bo%22">Zhang, Bo</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> zhan254@usc.edu</i><br /><searchLink fieldCode="AR" term="%22Cheng%2C+Zeming%22">Cheng, Zeming</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> zemingch@usc.edu</i><br /><searchLink fieldCode="AR" term="%22Pedram%2C+Massoud%22">Pedram, Massoud</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> pedram@usc.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Computers%22">IEEE Transactions on Computers</searchLink>. Feb2022, Vol. 71 Issue 2, p436-449. 14p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Data+compression%22">Data compression</searchLink><br /><searchLink fieldCode="DE" term="%22Elliptic+curve+cryptography%22">Elliptic curve cryptography</searchLink><br /><searchLink fieldCode="DE" term="%22Multiplication%22">Multiplication</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The proposed herein is a scalable high-radix (i.e., $2^m$ 2 m ) Montgomery Modular (MM) Multiplication circuit replacing the integer multiplications in each iteration of the Montgomery MM algorithm (related to the product of $m$ m bits of the multiplier and the multiplicand) with carry-save compressions and completely eliminating costly multiplications. Furthermore, the proposed Montgomery MM decomposes the multiplicand itself using a radix of $2^w$ 2 w with $w\geq 2m$ w ≥ 2 m , thereby achieving a scalable design, which can deliver an issue latency of one cycle and a cycle (count) latency of $O(N^2/(wmp))$ O (N 2 / (w m p)) where $p$ p denotes the number of available processing elements, each of which is designed to complete the above iteration by computing in part the product of $w$ w bits of the multiplicand and $m$ m bits of the multiplier. The area complexity of the proposed Montgomery MM is $O(wmp)$ O (w m p) , and thus, the Area-Latency-Product complexity is $O(N^{2})$ O (N 2) . [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Computers is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TC.2021.3052999 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 14 StartPage: 436 Subjects: – SubjectFull: Data compression Type: general – SubjectFull: Elliptic curve cryptography Type: general – SubjectFull: Multiplication Type: general Titles: – TitleFull: High-Radix Design of a Scalable Montgomery Modular Multiplier With Low Latency. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Zhang, Bo – PersonEntity: Name: NameFull: Cheng, Zeming – PersonEntity: Name: NameFull: Pedram, Massoud IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 02 Text: Feb2022 Type: published Y: 2022 Identifiers: – Type: issn-print Value: 00189340 Numbering: – Type: volume Value: 71 – Type: issue Value: 2 Titles: – TitleFull: IEEE Transactions on Computers Type: main |
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