Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design.
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| Title: | Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design. |
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| Authors: | Öztekin, Halit1 (AUTHOR) halitoztekin@subu.edu.tr, Lazzem, Abdelkader2 (AUTHOR), Pehlivan, İhsan2 (AUTHOR) |
| Source: | Journal of Supercomputing. Oct2023, Vol. 79 Issue 15, p17386-17418. 33p. |
| Subjects: | Associative storage, Mnemonics, Time complexity, Search algorithms, Programming languages |
| Abstract: | Memories play an essential role in computer systems as they store and retrieve data that may include instructions required for system operation. In the case of an assembler, the memory stores instructions such as the Opcode table (OPTAB), which contains the instructions in the form of machine language to implement the desired program. A search operation is required for the Opcode table to obtain the desired instruction. To improve the speed of search operations and overall system efficiency, there are various search operation algorithms and techniques available, including linear, binary, and hashing algorithms. However, they all share one critical aspect which is they rely on software-based techniques that counter difficulties with the von Neumann Model. In this paper, we introduce a hardware-based approach to enhance the search operation for OPTAB in assemblers, which is usually performed using software-based techniques. Our proposed method involves replacing the conventional Random Access Memory (RAM) with Binary Content-Addressable Memory (BiCAM), which enables parallel search operation within a single clock cycle. To demonstrate the effectiveness of our approach, we utilize the BZK.SAU.FPGA assembler as a case study. We provide a comparison of our proposed method with the RAM-based searching algorithm used in BZK.SAU.FPGA assembler. Time complexity analysis and a comparison of resource utilization and power efficiency are provided. Our results showed that the proposed method has a fixed time complexity of O(1) under all conditions, regardless of memory size or input size. An increase in both resource utilization and power efficiency has been observed in the BiCAM due to its hardware structure. However, it could still be considered a reasonable trade-off for time-sensitive applications. [ABSTRACT FROM AUTHOR] |
| Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
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| Header | DbId: egs DbLabel: Engineering Source An: 171101326 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Öztekin%2C+Halit%22">Öztekin, Halit</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> halitoztekin@subu.edu.tr</i><br /><searchLink fieldCode="AR" term="%22Lazzem%2C+Abdelkader%22">Lazzem, Abdelkader</searchLink><relatesTo>2</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Pehlivan%2C+İhsan%22">Pehlivan, İhsan</searchLink><relatesTo>2</relatesTo> (AUTHOR) – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+Supercomputing%22">Journal of Supercomputing</searchLink>. Oct2023, Vol. 79 Issue 15, p17386-17418. 33p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Associative+storage%22">Associative storage</searchLink><br /><searchLink fieldCode="DE" term="%22Mnemonics%22">Mnemonics</searchLink><br /><searchLink fieldCode="DE" term="%22Time+complexity%22">Time complexity</searchLink><br /><searchLink fieldCode="DE" term="%22Search+algorithms%22">Search algorithms</searchLink><br /><searchLink fieldCode="DE" term="%22Programming+languages%22">Programming languages</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Memories play an essential role in computer systems as they store and retrieve data that may include instructions required for system operation. In the case of an assembler, the memory stores instructions such as the Opcode table (OPTAB), which contains the instructions in the form of machine language to implement the desired program. A search operation is required for the Opcode table to obtain the desired instruction. To improve the speed of search operations and overall system efficiency, there are various search operation algorithms and techniques available, including linear, binary, and hashing algorithms. However, they all share one critical aspect which is they rely on software-based techniques that counter difficulties with the von Neumann Model. In this paper, we introduce a hardware-based approach to enhance the search operation for OPTAB in assemblers, which is usually performed using software-based techniques. Our proposed method involves replacing the conventional Random Access Memory (RAM) with Binary Content-Addressable Memory (BiCAM), which enables parallel search operation within a single clock cycle. To demonstrate the effectiveness of our approach, we utilize the BZK.SAU.FPGA assembler as a case study. We provide a comparison of our proposed method with the RAM-based searching algorithm used in BZK.SAU.FPGA assembler. Time complexity analysis and a comparison of resource utilization and power efficiency are provided. Our results showed that the proposed method has a fixed time complexity of O(1) under all conditions, regardless of memory size or input size. An increase in both resource utilization and power efficiency has been observed in the BiCAM due to its hardware structure. However, it could still be considered a reasonable trade-off for time-sensitive applications. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1007/s11227-023-05357-2 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 33 StartPage: 17386 Subjects: – SubjectFull: Associative storage Type: general – SubjectFull: Mnemonics Type: general – SubjectFull: Time complexity Type: general – SubjectFull: Search algorithms Type: general – SubjectFull: Programming languages Type: general Titles: – TitleFull: Using FPGA-based content-addressable memory for mnemonics instruction searching in assembler design. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Öztekin, Halit – PersonEntity: Name: NameFull: Lazzem, Abdelkader – PersonEntity: Name: NameFull: Pehlivan, İhsan IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 10 Text: Oct2023 Type: published Y: 2023 Identifiers: – Type: issn-print Value: 09208542 Numbering: – Type: volume Value: 79 – Type: issue Value: 15 Titles: – TitleFull: Journal of Supercomputing Type: main |
| ResultId | 1 |
