A fog-based anonymous authentication scheme with location privacy for wireless body area network with FPGA implementation.

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Title: A fog-based anonymous authentication scheme with location privacy for wireless body area network with FPGA implementation.
Authors: Rajasekaran, Arun Sekar1 (AUTHOR), Azees, M.2 (AUTHOR) azeesmm@gmail.com
Source: International Journal of Information Security. Feb2024, Vol. 23 Issue 1, p1-13. 13p.
Subjects: Body area networks, Verilog (Computer hardware description language), Field programmable gate arrays, Computer hardware description languages, Privacy
Abstract: In Healthcare 4.0, Wireless Body Area Networks (WBAN) takes place a major role in gathering real-time data of patients. The gathered real-time medical data is transferred through an insecure channel which may lead to several security attacks. To secure from these attacks, the methodology adopted in this work involves the use of a lightweight secure anonymous authentication scheme with location privacy and the implementation of a WBAN system using a cadence tool. Moreover, the methodology encompasses several stages, including initialization, registration, authentication, and location privacy. Further, the study adopts a systematic approach to address key challenges, such as integrity, privacy, security, and non-repudiation. The hypothesis underlying this research is that WBANs can provide accurate and real-time healthcare monitoring using an anonymous authentication scheme and validated by using cadence software. In this work, a digital signature-based cryptographic technique is used to verify the authenticity and integrity of the messages. The security analysis section proves that the system is efficient in resisting different security attacks. Though there are several existing works related to authentication, the proposed protocol is very efficient in terms of performance analysis parameters which are validated using Cygwin software. Computational cost is diminished by 13% and communication overhead is reduced by 32% when compared to the relevant recent works. Additionally, a practical hardware approach is designed using a Verilog Hardware description language and implemented in hardware on an Arty A7-100 SoC FPGA (Silicon on Chip Field Programmable Gate Array) Development board where the number of bonded IOBs utilization is only 10% and lastly synthesized using a Cadence tool with CMOS GPDK 90 nm technology. [ABSTRACT FROM AUTHOR]
Copyright of International Journal of Information Security is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Label: Title
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  Data: A fog-based anonymous authentication scheme with location privacy for wireless body area network with FPGA implementation.
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  Data: <searchLink fieldCode="AR" term="%22Rajasekaran%2C+Arun+Sekar%22">Rajasekaran, Arun Sekar</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Azees%2C+M%2E%22">Azees, M.</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> azeesmm@gmail.com</i>
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  Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Information+Security%22">International Journal of Information Security</searchLink>. Feb2024, Vol. 23 Issue 1, p1-13. 13p.
– Name: Subject
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  Data: <searchLink fieldCode="DE" term="%22Body+area+networks%22">Body area networks</searchLink><br /><searchLink fieldCode="DE" term="%22Verilog+%28Computer+hardware+description+language%29%22">Verilog (Computer hardware description language)</searchLink><br /><searchLink fieldCode="DE" term="%22Field+programmable+gate+arrays%22">Field programmable gate arrays</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+hardware+description+languages%22">Computer hardware description languages</searchLink><br /><searchLink fieldCode="DE" term="%22Privacy%22">Privacy</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: In Healthcare 4.0, Wireless Body Area Networks (WBAN) takes place a major role in gathering real-time data of patients. The gathered real-time medical data is transferred through an insecure channel which may lead to several security attacks. To secure from these attacks, the methodology adopted in this work involves the use of a lightweight secure anonymous authentication scheme with location privacy and the implementation of a WBAN system using a cadence tool. Moreover, the methodology encompasses several stages, including initialization, registration, authentication, and location privacy. Further, the study adopts a systematic approach to address key challenges, such as integrity, privacy, security, and non-repudiation. The hypothesis underlying this research is that WBANs can provide accurate and real-time healthcare monitoring using an anonymous authentication scheme and validated by using cadence software. In this work, a digital signature-based cryptographic technique is used to verify the authenticity and integrity of the messages. The security analysis section proves that the system is efficient in resisting different security attacks. Though there are several existing works related to authentication, the proposed protocol is very efficient in terms of performance analysis parameters which are validated using Cygwin software. Computational cost is diminished by 13% and communication overhead is reduced by 32% when compared to the relevant recent works. Additionally, a practical hardware approach is designed using a Verilog Hardware description language and implemented in hardware on an Arty A7-100 SoC FPGA (Silicon on Chip Field Programmable Gate Array) Development board where the number of bonded IOBs utilization is only 10% and lastly synthesized using a Cadence tool with CMOS GPDK 90 nm technology. [ABSTRACT FROM AUTHOR]
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  Label:
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  Data: <i>Copyright of International Journal of Information Security is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1007/s10207-023-00717-8
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        Text: English
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        Type: general
      – SubjectFull: Verilog (Computer hardware description language)
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      – SubjectFull: Field programmable gate arrays
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      – SubjectFull: Computer hardware description languages
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              Text: Feb2024
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              Y: 2024
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