Inverter and Universal Gates Implementation Using Novel Core Insulator Double Gate (CIDG) MOSFETs.
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| Title: | Inverter and Universal Gates Implementation Using Novel Core Insulator Double Gate (CIDG) MOSFETs. |
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| Authors: | Jaiswal, Sushmita1 (AUTHOR) sushmita.2019rel08@mnnit.ac.in, Gupta, Santosh Kumar1 (AUTHOR) skg@mnnit.ac.in |
| Source: | IETE Journal of Research. Aug2024, Vol. 70 Issue 8, p6940-6949. 10p. |
| Subjects: | NAND gates, Digital electronics, Mathematical logic, Short circuits, Metal oxide semiconductor field-effect transistors |
| Abstract: | The Core Insulator Double Gate (CIDG) MOSFET has been explored for digital applications in which the presence of core insulator diminishes the bulk conduction and reduces the off state current. The drain currents of n- and p-type CIDG MOSFETs are matched by tuning gate work functions to deliver the symmetrical pull-up and pull-down characteristics. The inverter and universal logic gates (NAND and NOR) have been designed and implemented to show the usability of the CIDG MOSFETs for digital applications. The DC and transient characteristic of the inverter along with Static Noise Margin (SNM) and time delay parameters have been examined. The designed Inverter shows steeper voltage transfer characteristics, reduced short circuit power dissipation and improved noise immunity. The CIDG MOSFET based NAND and NOR gate implementation and validation by transient analysis have been shown for the first time to the best knowledge of the authors. Also, the rise and fall times of the inverter, NAND and NOR gates have been found to be improved as compared to the DG MOSFET counterparts. The present analysis establishes that CIDG MOSFETs are useful in designing digital circuits with improved performance. [ABSTRACT FROM AUTHOR] |
| Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Header | DbId: egs DbLabel: Engineering Source An: 180429975 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Inverter and Universal Gates Implementation Using Novel Core Insulator Double Gate (CIDG) MOSFETs. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Jaiswal%2C+Sushmita%22">Jaiswal, Sushmita</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> sushmita.2019rel08@mnnit.ac.in</i><br /><searchLink fieldCode="AR" term="%22Gupta%2C+Santosh+Kumar%22">Gupta, Santosh Kumar</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> skg@mnnit.ac.in</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IETE+Journal+of+Research%22">IETE Journal of Research</searchLink>. Aug2024, Vol. 70 Issue 8, p6940-6949. 10p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22NAND+gates%22">NAND gates</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+electronics%22">Digital electronics</searchLink><br /><searchLink fieldCode="DE" term="%22Mathematical+logic%22">Mathematical logic</searchLink><br /><searchLink fieldCode="DE" term="%22Short+circuits%22">Short circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Metal+oxide+semiconductor+field-effect+transistors%22">Metal oxide semiconductor field-effect transistors</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The Core Insulator Double Gate (CIDG) MOSFET has been explored for digital applications in which the presence of core insulator diminishes the bulk conduction and reduces the off state current. The drain currents of n- and p-type CIDG MOSFETs are matched by tuning gate work functions to deliver the symmetrical pull-up and pull-down characteristics. The inverter and universal logic gates (NAND and NOR) have been designed and implemented to show the usability of the CIDG MOSFETs for digital applications. The DC and transient characteristic of the inverter along with Static Noise Margin (SNM) and time delay parameters have been examined. The designed Inverter shows steeper voltage transfer characteristics, reduced short circuit power dissipation and improved noise immunity. The CIDG MOSFET based NAND and NOR gate implementation and validation by transient analysis have been shown for the first time to the best knowledge of the authors. Also, the rise and fall times of the inverter, NAND and NOR gates have been found to be improved as compared to the DG MOSFET counterparts. The present analysis establishes that CIDG MOSFETs are useful in designing digital circuits with improved performance. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IETE Journal of Research is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=180429975 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1080/03772063.2024.2309229 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 10 StartPage: 6940 Subjects: – SubjectFull: NAND gates Type: general – SubjectFull: Digital electronics Type: general – SubjectFull: Mathematical logic Type: general – SubjectFull: Short circuits Type: general – SubjectFull: Metal oxide semiconductor field-effect transistors Type: general Titles: – TitleFull: Inverter and Universal Gates Implementation Using Novel Core Insulator Double Gate (CIDG) MOSFETs. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Jaiswal, Sushmita – PersonEntity: Name: NameFull: Gupta, Santosh Kumar IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2024 Type: published Y: 2024 Identifiers: – Type: issn-print Value: 03772063 Numbering: – Type: volume Value: 70 – Type: issue Value: 8 Titles: – TitleFull: IETE Journal of Research Type: main |
| ResultId | 1 |
