A Ku-Band Fully Differential Low-Power High-Input P1dB Low-Noise Amplifier.
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| Title: | A Ku-Band Fully Differential Low-Power High-Input P1dB Low-Noise Amplifier. |
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| Authors: | Lee, Sang-Rok1,2 (AUTHOR) sangrok.lee.85@gmail.com, Kim, Joon-Hyung1 (AUTHOR), Baek, Min-Seok1 (AUTHOR), Kim, Choul-Young1 (AUTHOR) cykim@cnu.ac.kr |
| Source: | Nanomaterials (2079-4991). Dec2024, Vol. 14 Issue 23, p1913. 8p. |
| Subjects: | Low noise amplifiers, Power amplifiers, Transistors |
| Abstract: | This paper introduces a Ku-band fully differential low-power high-input 1 dB compression point (P1dB) low-noise amplifier (LNA). A fully differential structure is employed to enhance the input P1dB, common-mode noise rejection, and second harmonic cancellation. The first stage adopts large transistors and is optimized for power consumption and noise figure (NF). The output stage is designed with class AB bias, resulting in improved P1dB, power consumption, and linearity. The proposed two-stage fully differential common-source (CS) LNA was implemented using 65 nm bulk complementary metal oxide semiconductor (CMOS) technology. The fabricated LNA achieved a minimum NF of 2.7 dB at 13.6 GHz. Furthermore, it achieved a maximum gain of 19.92 dB at 12.2 GHz. Additionally, the LNA has an input P1dB of −7.45 dBm and an output power 1 dB compression point (OP1dB) of 10.09 dBm, both measured at 15.6 GHz. The LNA operates with a power consumption of 11 mW at a 1 V supply, and occupies a core size of 0.75 mm × 0.35 mm. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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| Abstract: | This paper introduces a Ku-band fully differential low-power high-input 1 dB compression point (P1dB) low-noise amplifier (LNA). A fully differential structure is employed to enhance the input P1dB, common-mode noise rejection, and second harmonic cancellation. The first stage adopts large transistors and is optimized for power consumption and noise figure (NF). The output stage is designed with class AB bias, resulting in improved P1dB, power consumption, and linearity. The proposed two-stage fully differential common-source (CS) LNA was implemented using 65 nm bulk complementary metal oxide semiconductor (CMOS) technology. The fabricated LNA achieved a minimum NF of 2.7 dB at 13.6 GHz. Furthermore, it achieved a maximum gain of 19.92 dB at 12.2 GHz. Additionally, the LNA has an input P1dB of −7.45 dBm and an output power 1 dB compression point (OP1dB) of 10.09 dBm, both measured at 15.6 GHz. The LNA operates with a power consumption of 11 mW at a 1 V supply, and occupies a core size of 0.75 mm × 0.35 mm. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 20794991 |
| DOI: | 10.3390/nano14231913 |
