VLSI implementation of image compressor using probabilistic run length coding.
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| Title: | VLSI implementation of image compressor using probabilistic run length coding. |
|---|---|
| Authors: | Boddu, Mahesh1 (AUTHOR), Mandal, Soumitra Kumar2 (AUTHOR) skmandal@nitttrkol.ac.in |
| Source: | Expert Systems. Jan2025, Vol. 42 Issue 1, p1-14. 14p. |
| Subjects: | Run-length encoding, Finite state machines, Block codes, Error probability, Fuzzy logic, Image compression |
| Abstract: | Multimedia applications, such as image processing including image and video transfer, heavily rely on reduction. The traditional device methods to picture reduction use more space, energy, and processing time. The majority of current efforts use the Golomb‐Rice encoding, due to its larger memory requirement and higher computing difficulty. So, this research concentrated on hardware design‐oriented probability run length (PRL) coding technique based on lossless colour image compression. The block truncation coding (BTC) features of the compression process are used by the suggested PRL method. The proposed image compression hardware consists of various modules such as a Parameter calculator, fuzzy table, bitmap generator, BTC parameters training, prediction, and error control, and PRL‐based finite state machine (PRL‐FSM). The proposed image compressor utilizes the parameter calculator block, which estimates the block type based on the image pixel intensities for each sub‐block. Thus, each block of the image is compressed by using a new block type and generates a variable block size. The proposed method utilizes the PRL‐BTC encoding method, which also calculates the probability of error between the compressed image to the test image. The process is iterated until the performance trade‐off between hardware cost and compression ratio (CR) is achieved. Hence, both smooth regions and non‐smooth regions of images are perfectly compressed by the probability‐based block selection. The simulation results show that the proposed method resulted in a better area, power, delay metrics, peak signal‐to‐noise ratio (PSNR), and CR compared to the state of art approaches. [ABSTRACT FROM AUTHOR] |
| Copyright of Expert Systems is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
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| Header | DbId: egs DbLabel: Engineering Source An: 181701514 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: VLSI implementation of image compressor using probabilistic run length coding. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Boddu%2C+Mahesh%22">Boddu, Mahesh</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Mandal%2C+Soumitra+Kumar%22">Mandal, Soumitra Kumar</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> skmandal@nitttrkol.ac.in</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Expert+Systems%22">Expert Systems</searchLink>. Jan2025, Vol. 42 Issue 1, p1-14. 14p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Run-length+encoding%22">Run-length encoding</searchLink><br /><searchLink fieldCode="DE" term="%22Finite+state+machines%22">Finite state machines</searchLink><br /><searchLink fieldCode="DE" term="%22Block+codes%22">Block codes</searchLink><br /><searchLink fieldCode="DE" term="%22Error+probability%22">Error probability</searchLink><br /><searchLink fieldCode="DE" term="%22Fuzzy+logic%22">Fuzzy logic</searchLink><br /><searchLink fieldCode="DE" term="%22Image+compression%22">Image compression</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Multimedia applications, such as image processing including image and video transfer, heavily rely on reduction. The traditional device methods to picture reduction use more space, energy, and processing time. The majority of current efforts use the Golomb‐Rice encoding, due to its larger memory requirement and higher computing difficulty. So, this research concentrated on hardware design‐oriented probability run length (PRL) coding technique based on lossless colour image compression. The block truncation coding (BTC) features of the compression process are used by the suggested PRL method. The proposed image compression hardware consists of various modules such as a Parameter calculator, fuzzy table, bitmap generator, BTC parameters training, prediction, and error control, and PRL‐based finite state machine (PRL‐FSM). The proposed image compressor utilizes the parameter calculator block, which estimates the block type based on the image pixel intensities for each sub‐block. Thus, each block of the image is compressed by using a new block type and generates a variable block size. The proposed method utilizes the PRL‐BTC encoding method, which also calculates the probability of error between the compressed image to the test image. The process is iterated until the performance trade‐off between hardware cost and compression ratio (CR) is achieved. Hence, both smooth regions and non‐smooth regions of images are perfectly compressed by the probability‐based block selection. The simulation results show that the proposed method resulted in a better area, power, delay metrics, peak signal‐to‐noise ratio (PSNR), and CR compared to the state of art approaches. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Expert Systems is the property of Wiley-Blackwell and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1111/exsy.13398 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 14 StartPage: 1 Subjects: – SubjectFull: Run-length encoding Type: general – SubjectFull: Finite state machines Type: general – SubjectFull: Block codes Type: general – SubjectFull: Error probability Type: general – SubjectFull: Fuzzy logic Type: general – SubjectFull: Image compression Type: general Titles: – TitleFull: VLSI implementation of image compressor using probabilistic run length coding. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Boddu, Mahesh – PersonEntity: Name: NameFull: Mandal, Soumitra Kumar IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 01 Text: Jan2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 02664720 Numbering: – Type: volume Value: 42 – Type: issue Value: 1 Titles: – TitleFull: Expert Systems Type: main |
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