Hierarchical Binary Set Partitioning in Cache Memories.
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| Title: | Hierarchical Binary Set Partitioning in Cache Memories. |
|---|---|
| Authors: | Zarandi, Hamid Reza1 zarandi@ce.sharif.edu, Sarbazi-Azad, Hamid1,2 azad@sharif.edu |
| Source: | Journal of Supercomputing. Feb2005, Vol. 31 Issue 2, p185-202. 18p. |
| Subjects: | Memory hierarchy (Computer science), Cache memory, Computer storage devices, Computer science, Associative storage |
| Abstract: | In this paper, a new cache placement scheme is proposed to achieve higher hit ratios with respect to the two conventional schemes namely set-associative and direct mapping. Similar to set-associative, in this scheme, cache space is divided into sets of different sizes. Hence, the length of tag fields associated to each set is also variable and depends on the partition it is in. The proposed mapping function has been simulated with some standard trace files and statistics are gathered and analyzed for different cache configurations. The results reveal that the proposed scheme exhibits a higher hit ratio compared to the two well-known mapping schemes, namely set-associative and direct mapping, using LRU replacement policy. [ABSTRACT FROM AUTHOR] |
| Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
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| Items | – Name: Title Label: Title Group: Ti Data: Hierarchical Binary Set Partitioning in Cache Memories. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Zarandi%2C+Hamid+Reza%22">Zarandi, Hamid Reza</searchLink><relatesTo>1</relatesTo><i> zarandi@ce.sharif.edu</i><br /><searchLink fieldCode="AR" term="%22Sarbazi-Azad%2C+Hamid%22">Sarbazi-Azad, Hamid</searchLink><relatesTo>1,2</relatesTo><i> azad@sharif.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22Journal+of+Supercomputing%22">Journal of Supercomputing</searchLink>. Feb2005, Vol. 31 Issue 2, p185-202. 18p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Memory+hierarchy+%28Computer+science%29%22">Memory hierarchy (Computer science)</searchLink><br /><searchLink fieldCode="DE" term="%22Cache+memory%22">Cache memory</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+storage+devices%22">Computer storage devices</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+science%22">Computer science</searchLink><br /><searchLink fieldCode="DE" term="%22Associative+storage%22">Associative storage</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In this paper, a new cache placement scheme is proposed to achieve higher hit ratios with respect to the two conventional schemes namely set-associative and direct mapping. Similar to set-associative, in this scheme, cache space is divided into sets of different sizes. Hence, the length of tag fields associated to each set is also variable and depends on the partition it is in. The proposed mapping function has been simulated with some standard trace files and statistics are gathered and analyzed for different cache configurations. The results reveal that the proposed scheme exhibits a higher hit ratio compared to the two well-known mapping schemes, namely set-associative and direct mapping, using LRU replacement policy. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1007/s11227-005-0106-5 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 18 StartPage: 185 Subjects: – SubjectFull: Memory hierarchy (Computer science) Type: general – SubjectFull: Cache memory Type: general – SubjectFull: Computer storage devices Type: general – SubjectFull: Computer science Type: general – SubjectFull: Associative storage Type: general Titles: – TitleFull: Hierarchical Binary Set Partitioning in Cache Memories. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Zarandi, Hamid Reza – PersonEntity: Name: NameFull: Sarbazi-Azad, Hamid IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 02 Text: Feb2005 Type: published Y: 2005 Identifiers: – Type: issn-print Value: 09208542 Numbering: – Type: volume Value: 31 – Type: issue Value: 2 Titles: – TitleFull: Journal of Supercomputing Type: main |
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