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基于三维混沌系统的图像加密及FPGA实现.

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Title: 基于三维混沌系统的图像加密及FPGA实现.
Alternate Title: Image encryption and FPGA implementation based on 3D chaotic system.
Authors: 闫少辉1 mortals_ysh@163.com, 姜嘉伟1 3362839699@qq.com, 崔 宇1 760435448@qq.com
Source: Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. Apr2025, Vol. 47 Issue 4, p686-694. 9p.
Subjects: Image encryption, Gate array circuits, Systems software, Software architecture, Timing circuits
Abstract (English): This paper aims to implement the application of a chaotic system in image encryption within field-programmable gate array (FPGA). Based on the improved Bao chaotic system, the chaotic system is discretized using the improved Euler's algorithm, and the hardware design is carried out using Verilog language. The accuracy of chaotic system at the software design level is verified through register transfer level (TRL) circuits and ModelSim timing simulation. Discretized chaotic sequences are utilized on the FPGA for image encryption and corresponding key decryption, and the feasibility of the encryption scheme is verified through a video graphics array (VGA) interface. This study successfully implements image encryption using chaotic system at the hardware level, laying the foundation for further application and implementation of chaotic encryption technology on FPGA. [ABSTRACT FROM AUTHOR]
Abstract (Chinese): 提出一种基于 FPGA 的混沌系统实现方法, 并成功将其应用在图像加密任务。基于改进的 Bao混沌系统, 利用改进的欧拉算法对混沌系统进行离散化, 使用 Verilog语言进行硬件设计;通过寄存器 传输级 RTL电路及 ModelSim 时序仿真验证混沌系统在软件设计层面的准确性。利用离散化的混沌序 列在 FPGA 中对图像进行加密和相应密钥的解密, 并通过 VGA 正确显示, 验证了加密方案的可行性。在 硬件层面成功实现混沌系统及图像加解密, 为混沌加密技术在 FPGA 中的进一步应用奠定了基础。 [ABSTRACT FROM AUTHOR]
Copyright of Computer Engineering & Science / Jisuanji Gongcheng yu Kexue is the property of Computer Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: 基于三维混沌系统的图像加密及FPGA实现.
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  Data: Image encryption and FPGA implementation based on 3D chaotic system.
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  Data: <searchLink fieldCode="AR" term="%22闫少辉%22">闫少辉</searchLink><relatesTo>1</relatesTo><i> mortals_ysh@163.com</i><br /><searchLink fieldCode="AR" term="%22姜嘉伟%22">姜嘉伟</searchLink><relatesTo>1</relatesTo><i> 3362839699@qq.com</i><br /><searchLink fieldCode="AR" term="%22崔+宇%22">崔 宇</searchLink><relatesTo>1</relatesTo><i> 760435448@qq.com</i>
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– Name: Subject
  Label: Subjects
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  Data: <searchLink fieldCode="DE" term="%22Image+encryption%22">Image encryption</searchLink><br /><searchLink fieldCode="DE" term="%22Gate+array+circuits%22">Gate array circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Systems+software%22">Systems software</searchLink><br /><searchLink fieldCode="DE" term="%22Software+architecture%22">Software architecture</searchLink><br /><searchLink fieldCode="DE" term="%22Timing+circuits%22">Timing circuits</searchLink>
– Name: Abstract
  Label: Abstract (English)
  Group: Ab
  Data: This paper aims to implement the application of a chaotic system in image encryption within field-programmable gate array (FPGA). Based on the improved Bao chaotic system, the chaotic system is discretized using the improved Euler's algorithm, and the hardware design is carried out using Verilog language. The accuracy of chaotic system at the software design level is verified through register transfer level (TRL) circuits and ModelSim timing simulation. Discretized chaotic sequences are utilized on the FPGA for image encryption and corresponding key decryption, and the feasibility of the encryption scheme is verified through a video graphics array (VGA) interface. This study successfully implements image encryption using chaotic system at the hardware level, laying the foundation for further application and implementation of chaotic encryption technology on FPGA. [ABSTRACT FROM AUTHOR]
– Name: Abstract
  Label: Abstract (Chinese)
  Group: Ab
  Data: 提出一种基于 FPGA 的混沌系统实现方法, 并成功将其应用在图像加密任务。基于改进的 Bao混沌系统, 利用改进的欧拉算法对混沌系统进行离散化, 使用 Verilog语言进行硬件设计;通过寄存器 传输级 RTL电路及 ModelSim 时序仿真验证混沌系统在软件设计层面的准确性。利用离散化的混沌序 列在 FPGA 中对图像进行加密和相应密钥的解密, 并通过 VGA 正确显示, 验证了加密方案的可行性。在 硬件层面成功实现混沌系统及图像加解密, 为混沌加密技术在 FPGA 中的进一步应用奠定了基础。 [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Computer Engineering & Science / Jisuanji Gongcheng yu Kexue is the property of Computer Engineering & Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
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      – Type: doi
        Value: 10.3969/j.issn.1007-130X.2025.04.012
    Languages:
      – Code: chi
        Text: Chinese
    PhysicalDescription:
      Pagination:
        PageCount: 9
        StartPage: 686
    Subjects:
      – SubjectFull: Image encryption
        Type: general
      – SubjectFull: Gate array circuits
        Type: general
      – SubjectFull: Systems software
        Type: general
      – SubjectFull: Software architecture
        Type: general
      – SubjectFull: Timing circuits
        Type: general
    Titles:
      – TitleFull: 基于三维混沌系统的图像加密及FPGA实现.
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            NameFull: 闫少辉
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            NameFull: 姜嘉伟
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            NameFull: 崔 宇
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            – D: 01
              M: 04
              Text: Apr2025
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              Y: 2025
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