Bibliographic Details
| Title: |
用于低间隔加速部件控制的多线程无中断RISC-V 处理器. |
| Alternate Title: |
A multi-threaded interrupt-free RISC-V processor for low-latency acceleration component control. |
| Authors: |
张伟伟1 sezww@mail.scut.edu.cn, 陈 虎1 chenhu@scut.edu.cn |
| Source: |
Computer Engineering & Science / Jisuanji Gongcheng yu Kexue. May2025, Vol. 47 Issue 5, p787-796. 10p. |
| Subjects: |
Systems software, Social responsibility of business, Hardware, Signals & signaling, Synchronization |
| Abstract (English): |
To meet the demand for controlling low-latency acceleration components, this paper proposes a multi-threaded interrupt-free RV32I microprocessor (MIRV) architecture and its associated software system. MIRV adopts a six-stage pipeline, single-issue in-order execution structure, utilizing data forwarding techniques to resolve most intra-thread data hazards. The hardware supports four-thread register files and program counters, employing a coarse-grained thread scheduling mechanism that enables zero-overhead thread switching when intra-thread data or control hazards cannot be resolved. Additionally, this paper introduces a hardware-software unified signaling mechanism, leveraging dedicated CSR (Control and Status Register) registers to facilitate thread suspension and rapid wake-up for signals from external acceleration components. Software-based signal handling is implemented to achieve multithread synchronization and mutual exclusion. After synthesis, MIRV occupies 1 811 LUTs and achieves a 210 MHz clock frequency. Compared to PicoRV32 and DarkRISCV, MIRV demonstrates higher operating frequency and superior performance. We implemented a producer-consumer-based LED chaser control test case in C on the MK7160FA development board. In this experiment, the latency from hardware timer signal generation to software-driven external LED control signals was only 10 clock cycles, validating MIRV's low-latency response capability to external hardware events. With low hardware resource consumption, high performance, and high-level language programmability, MIRV is well-suited as a controller for various low-latency acceleration components. [ABSTRACT FROM AUTHOR] |
| Abstract (Chinese): |
为满足控制低间隔加速部件的需求,提出了一种多线程无中断的RV32I微处理器(MIRV) 结构和相关软件系统。MIRV 采用六级流水线单发射顺序执行结构,结合数据重定向技术解决了线程内 指令间的大部分数据冲突问题。硬件支持4个线程的寄存器组和程序计数器,采用粗粒度线程调度机制, 能够在线程内数据冲突和控制冲突无法解决时实现零时间开销的线程切换。还提出了硬件与软件统一的 信号机制,利用特定CSR寄存器实现线程对外部加速部件信号的等待和快速唤醒,通过软件信号处理实 现多线程同步与互斥。MIRV 综合后包含1 811个LUT,主频为210 MHz。与PicoRV32和DarkRISCV 相比,MIRV 主频较高且拥有较为优秀的性能。在MK7160FA 开发板上使用C语言实现了基于生产者-消费者模型的流水灯控制测试案例,在该实验中,从硬件定时器发出信号到软件产生外部LED的控制信 号仅需要10个时钟周期,验证了MIRV 对外部硬件事件信号的低延迟响应能力。MIRV 具备较低的硬 件资源占用量、优异的性能和高级语言编程能力,可作为多种低间隔加速部件的控制器. [ABSTRACT FROM AUTHOR] |
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| Database: |
Engineering Source |
