Improving the positive feedback adiabatic logic family.

Saved in:

Bibliographic Details
Title:	Improving the positive feedback adiabatic logic family.
Authors:	Fischer, J.¹ juergen.fischer@tum.de, Amirante, E.¹, Bargagli-Stoffi, A.¹, Schmitt-Landsiedel, D.¹
Source:	Advances in Radio Science. 2004, Vol. 2, p221-225. 5p.
Subjects:	Electronics mathematics, Energy dissipation, Adiabatic invariants, Simulation methods & models
Abstract:	Positive Feedback Adiabatic Logic (PFAL) shows the lowest energy dissipation among adiabatic logic families based on cross-coupled transistors, due to the reduction of both adiabatic and non-adiabatic losses. The dissipation primarily depends on the resistance of the charging path, which consists of a single p-channel MOSFET during the recovery phase. In this paper, a new logic family called Improved PFAL (IPFAL) is proposed, where all n- and p-channel devices are swapped so that the charge can be recovered through an n-channel MOSFET. This allows to decrease the resistance of the charging path up to a factor of 2, and it enables a significant reduction of the energy dissipation. Simulations based on a 0.13µm CMOS process confirm the improvements in terms of power consumption over a large frequency range. However, the same simple design rule, which enables in PFAL an additional reduction of the dissipation by optimal transistor sizing, does not apply to IPFAL. Therefore, the influence of several sources of dissipation for a generic IPFAL gate is illustrated and discussed, in order to lower the power consumption and achieve better performance. [ABSTRACT FROM AUTHOR]
	Copyright of Advances in Radio Science is the property of Copernicus Gesellschaft mbH and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database:	Engineering Source

Description
Abstract:	Positive Feedback Adiabatic Logic (PFAL) shows the lowest energy dissipation among adiabatic logic families based on cross-coupled transistors, due to the reduction of both adiabatic and non-adiabatic losses. The dissipation primarily depends on the resistance of the charging path, which consists of a single p-channel MOSFET during the recovery phase. In this paper, a new logic family called Improved PFAL (IPFAL) is proposed, where all n- and p-channel devices are swapped so that the charge can be recovered through an n-channel MOSFET. This allows to decrease the resistance of the charging path up to a factor of 2, and it enables a significant reduction of the energy dissipation. Simulations based on a 0.13µm CMOS process confirm the improvements in terms of power consumption over a large frequency range. However, the same simple design rule, which enables in PFAL an additional reduction of the dissipation by optimal transistor sizing, does not apply to IPFAL. Therefore, the influence of several sources of dissipation for a generic IPFAL gate is illustrated and discussed, in order to lower the power consumption and achieve better performance. [ABSTRACT FROM AUTHOR]
ISSN:	16849965