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Efficient quantum-dot adder optimisation and analysis for future circuits.

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Title: Efficient quantum-dot adder optimisation and analysis for future circuits.
Authors: Chugh, Hemanshi1 (AUTHOR), Singh, Sonal1 (AUTHOR) sonalsingh@dtu.ac.in
Source: International Journal of Electronics. Sep2025, Vol. 112 Issue 9, p2006-2026. 21p.
Subjects: Adders (Digital electronics), Electronic circuit design, Semiconductor technology, Quantum dot synthesis, Energy dissipation, Quantum dot devices, Digital electronics
Abstract: In recent years, the rapid scaling of transistors has necessitated the exploration of advanced alternatives to Complementary metal oxide semiconductor(CMOS) technology for future progress. Quantum-dot cellular automata(QCA) technology has emerged as a promising solution, offering highly dense, high-speed, and low-power circuits. Among the critical digital building blocks, adder circuits play a crucial role in arithmetic and logic units. Consequently, optimising these circuits in terms of area, delay, and quantum cost is essential for the development of efficient designs. This paper presents effective multi-layer n-bit ripple carry adder(RCA) circuits, utilising full adder(FA) circuit. The outputs are generated in distinct layers and verified using the QCADesigner-Ev2.2 tool with bi-stable and coherence vector energy setups, employing Euler and Runge-Kutta methods.Additionally, the proposed designs are evaluated for various design metrics at three different scale factors(1,0.8889,and 0.7778), corresponding to cell sizes of 18 × 18 $nm$ nm , 16 × 16 $nm$ nm , and 14 × 14 $nm$ nm respectively. The temperature's impact on the average output polarisation of the FA is explored. The research demonstrates an n-bit-RCA surpassing existing designs with cost optimisations of 89.5%, 86%, and 90.3% for 4-bit,8-bit and 16-bit circuits, respectively. The paper also provides a thorough energy dissipation analysis for the proposed adder design. [ABSTRACT FROM AUTHOR]
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Database: Engineering Source
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Abstract:In recent years, the rapid scaling of transistors has necessitated the exploration of advanced alternatives to Complementary metal oxide semiconductor(CMOS) technology for future progress. Quantum-dot cellular automata(QCA) technology has emerged as a promising solution, offering highly dense, high-speed, and low-power circuits. Among the critical digital building blocks, adder circuits play a crucial role in arithmetic and logic units. Consequently, optimising these circuits in terms of area, delay, and quantum cost is essential for the development of efficient designs. This paper presents effective multi-layer n-bit ripple carry adder(RCA) circuits, utilising full adder(FA) circuit. The outputs are generated in distinct layers and verified using the QCADesigner-Ev2.2 tool with bi-stable and coherence vector energy setups, employing Euler and Runge-Kutta methods.Additionally, the proposed designs are evaluated for various design metrics at three different scale factors(1,0.8889,and 0.7778), corresponding to cell sizes of 18 × 18 $nm$ nm , 16 × 16 $nm$ nm , and 14 × 14 $nm$ nm respectively. The temperature's impact on the average output polarisation of the FA is explored. The research demonstrates an n-bit-RCA surpassing existing designs with cost optimisations of 89.5%, 86%, and 90.3% for 4-bit,8-bit and 16-bit circuits, respectively. The paper also provides a thorough energy dissipation analysis for the proposed adder design. [ABSTRACT FROM AUTHOR]
ISSN:00207217
DOI:10.1080/00207217.2024.2408799