Efficient quantum-dot adder optimisation and analysis for future circuits.
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| Title: | Efficient quantum-dot adder optimisation and analysis for future circuits. |
|---|---|
| Authors: | Chugh, Hemanshi1 (AUTHOR), Singh, Sonal1 (AUTHOR) sonalsingh@dtu.ac.in |
| Source: | International Journal of Electronics. Sep2025, Vol. 112 Issue 9, p2006-2026. 21p. |
| Subjects: | Adders (Digital electronics), Electronic circuit design, Semiconductor technology, Quantum dot synthesis, Energy dissipation, Quantum dot devices, Digital electronics |
| Abstract: | In recent years, the rapid scaling of transistors has necessitated the exploration of advanced alternatives to Complementary metal oxide semiconductor(CMOS) technology for future progress. Quantum-dot cellular automata(QCA) technology has emerged as a promising solution, offering highly dense, high-speed, and low-power circuits. Among the critical digital building blocks, adder circuits play a crucial role in arithmetic and logic units. Consequently, optimising these circuits in terms of area, delay, and quantum cost is essential for the development of efficient designs. This paper presents effective multi-layer n-bit ripple carry adder(RCA) circuits, utilising full adder(FA) circuit. The outputs are generated in distinct layers and verified using the QCADesigner-Ev2.2 tool with bi-stable and coherence vector energy setups, employing Euler and Runge-Kutta methods.Additionally, the proposed designs are evaluated for various design metrics at three different scale factors(1,0.8889,and 0.7778), corresponding to cell sizes of 18 × 18 $nm$ nm , 16 × 16 $nm$ nm , and 14 × 14 $nm$ nm respectively. The temperature's impact on the average output polarisation of the FA is explored. The research demonstrates an n-bit-RCA surpassing existing designs with cost optimisations of 89.5%, 86%, and 90.3% for 4-bit,8-bit and 16-bit circuits, respectively. The paper also provides a thorough energy dissipation analysis for the proposed adder design. [ABSTRACT FROM AUTHOR] |
| Copyright of International Journal of Electronics is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 187098022 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Efficient quantum-dot adder optimisation and analysis for future circuits. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Chugh%2C+Hemanshi%22">Chugh, Hemanshi</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Singh%2C+Sonal%22">Singh, Sonal</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> sonalsingh@dtu.ac.in</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Electronics%22">International Journal of Electronics</searchLink>. Sep2025, Vol. 112 Issue 9, p2006-2026. 21p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Adders+%28Digital+electronics%29%22">Adders (Digital electronics)</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+circuit+design%22">Electronic circuit design</searchLink><br /><searchLink fieldCode="DE" term="%22Semiconductor+technology%22">Semiconductor technology</searchLink><br /><searchLink fieldCode="DE" term="%22Quantum+dot+synthesis%22">Quantum dot synthesis</searchLink><br /><searchLink fieldCode="DE" term="%22Energy+dissipation%22">Energy dissipation</searchLink><br /><searchLink fieldCode="DE" term="%22Quantum+dot+devices%22">Quantum dot devices</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+electronics%22">Digital electronics</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: In recent years, the rapid scaling of transistors has necessitated the exploration of advanced alternatives to Complementary metal oxide semiconductor(CMOS) technology for future progress. Quantum-dot cellular automata(QCA) technology has emerged as a promising solution, offering highly dense, high-speed, and low-power circuits. Among the critical digital building blocks, adder circuits play a crucial role in arithmetic and logic units. Consequently, optimising these circuits in terms of area, delay, and quantum cost is essential for the development of efficient designs. This paper presents effective multi-layer n-bit ripple carry adder(RCA) circuits, utilising full adder(FA) circuit. The outputs are generated in distinct layers and verified using the QCADesigner-Ev2.2 tool with bi-stable and coherence vector energy setups, employing Euler and Runge-Kutta methods.Additionally, the proposed designs are evaluated for various design metrics at three different scale factors(1,0.8889,and 0.7778), corresponding to cell sizes of 18 × 18 $nm$ nm , 16 × 16 $nm$ nm , and 14 × 14 $nm$ nm respectively. The temperature's impact on the average output polarisation of the FA is explored. The research demonstrates an n-bit-RCA surpassing existing designs with cost optimisations of 89.5%, 86%, and 90.3% for 4-bit,8-bit and 16-bit circuits, respectively. The paper also provides a thorough energy dissipation analysis for the proposed adder design. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of International Journal of Electronics is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1080/00207217.2024.2408799 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 21 StartPage: 2006 Subjects: – SubjectFull: Adders (Digital electronics) Type: general – SubjectFull: Electronic circuit design Type: general – SubjectFull: Semiconductor technology Type: general – SubjectFull: Quantum dot synthesis Type: general – SubjectFull: Energy dissipation Type: general – SubjectFull: Quantum dot devices Type: general – SubjectFull: Digital electronics Type: general Titles: – TitleFull: Efficient quantum-dot adder optimisation and analysis for future circuits. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Chugh, Hemanshi – PersonEntity: Name: NameFull: Singh, Sonal IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 09 Text: Sep2025 Type: published Y: 2025 Identifiers: – Type: issn-print Value: 00207217 Numbering: – Type: volume Value: 112 – Type: issue Value: 9 Titles: – TitleFull: International Journal of Electronics Type: main |
| ResultId | 1 |
