HPC Packaging Platform Including Compression Molding.

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Bibliographic Details
Title:	HPC Packaging Platform Including Compression Molding.
Authors:	Adler, M.¹, Becker, K.-F.¹, Braun, T.¹, Hoelck, O.¹, Gaebler, A.¹, Maass, U.¹, Ndip, I.¹, Zoschke, K.¹, Schiffer, M.¹, Schneider-Ramelow, M.²
Source:	Journal of Microelectronic & Electronic Packaging. 2025, Vol. 22 Issue 3, p71-77. 7p.
Subjects:	High performance computing, Compression molding, Deformations (Mechanics), Packaging, Mass production, Electronic packaging, Multichip modules (Microelectronics), Computer engineering
Abstract:	Efficient high-performance computing (HPC), especially for applications in the field of artificial intelligence, requires the use of specialized computing and memory chips, short transmission paths and high packing densities. A key technology for HPC is therefore the integration of processors and memory stacks in a single System-in-Package (SiP) using silicon-based interposers. Manufacturing concepts have been developed for such a package, each of which utilizes different process flows to build an HPC module. Following a holistic approach, the process flow is evaluated from the processing of the interposer with high density organic redistribution layers, compression molding and balling. Evaluation methods were defined for the individual process steps and criteria established to enable the selection of suitable process steps and combinations for an optimized package. The process flow options were realized and analyzed for a reference HPC module. An important parameter for all these process steps is warpage, since an exceeding warpage can make processing impossible. For compression molding, a key process step, the influence of different materials and process parameters on the warpage was therefore investigated. The results of the process development are presented for the backend process flow with an emphasis on compression molding process step, an evaluation of the process variants is carried out according to the previously developed criteria and the most suitable variant of the process step for later production is selected on this basis. [ABSTRACT FROM AUTHOR]
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Database:	Engineering Source

Description
Abstract:	Efficient high-performance computing (HPC), especially for applications in the field of artificial intelligence, requires the use of specialized computing and memory chips, short transmission paths and high packing densities. A key technology for HPC is therefore the integration of processors and memory stacks in a single System-in-Package (SiP) using silicon-based interposers. Manufacturing concepts have been developed for such a package, each of which utilizes different process flows to build an HPC module. Following a holistic approach, the process flow is evaluated from the processing of the interposer with high density organic redistribution layers, compression molding and balling. Evaluation methods were defined for the individual process steps and criteria established to enable the selection of suitable process steps and combinations for an optimized package. The process flow options were realized and analyzed for a reference HPC module. An important parameter for all these process steps is warpage, since an exceeding warpage can make processing impossible. For compression molding, a key process step, the influence of different materials and process parameters on the warpage was therefore investigated. The results of the process development are presented for the backend process flow with an emphasis on compression molding process step, an evaluation of the process variants is carried out according to the previously developed criteria and the most suitable variant of the process step for later production is selected on this basis. [ABSTRACT FROM AUTHOR]
ISSN:	15514897
DOI:	10.4071/001c.143003