Cache-Oblivious B-Trees.

Saved in:
Bibliographic Details
Title: Cache-Oblivious B-Trees.
Authors: Bender, Michael A.1 bender@cs.sunysb.edu, Demaine, Erik D.2 edemaine@mit.edu, Farach-Colton, Martin3 farach@cs.rutgers.edu
Source: SIAM Journal on Computing. 2005, Vol. 35 Issue 2, p341. 18p.
Subjects: Memory hierarchy (Computer science), Computer storage devices, Data transmission systems, Digital communications, Computer input-output equipment
Abstract: This paper presents two dynamic search trees attaining near-optimal performance on any hierarchical memory. The data structures are independent of the parameters of the memory hierarchy, e.g., the number of memory levels, the block-transfer size at each level, and the relative speeds of memory levels. The performance is analyzed in terms of the number of memory transfers between two memory levels with an arbitrary block-transfer size of B; this analysis can then be applied to every adjacent pair of levels in a multilevel memory hierarchy. Both search trees match the optimal search bound of $\Theta(1+\log_{B+1}N)$ memory transfers. This bound is also achieved by the classic B-tree data structure on a two-level memory hierarchy with a known block-transfer size B. The first search tree supports insertions and deletions in $\Theta(1+\log_{B+1}N)$ amortized memory transfers, which matches the B-tree's worst-case bounds. The second search tree supports scanning S consecutive elements optimally in $\Theta(1+S/B)$ memory transfers and supports insertions and deletions in $\Theta(1+\log_{B+1}N + \frac{\log^2N}{B})$ amortized memory transfers, matching the performance of the B-tree for $B = \Omega(\log N \log\log N)$. [ABSTRACT FROM AUTHOR]
Copyright of SIAM Journal on Computing is the property of Society for Industrial & Applied Mathematics and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
FullText Links:
  – Type: pdflink
Text:
  Availability: 0
Header DbId: egs
DbLabel: Engineering Source
An: 19072030
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Cache-Oblivious B-Trees.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Bender%2C+Michael+A%2E%22">Bender, Michael A.</searchLink><relatesTo>1</relatesTo><i> bender@cs.sunysb.edu</i><br /><searchLink fieldCode="AR" term="%22Demaine%2C+Erik+D%2E%22">Demaine, Erik D.</searchLink><relatesTo>2</relatesTo><i> edemaine@mit.edu</i><br /><searchLink fieldCode="AR" term="%22Farach-Colton%2C+Martin%22">Farach-Colton, Martin</searchLink><relatesTo>3</relatesTo><i> farach@cs.rutgers.edu</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22SIAM+Journal+on+Computing%22">SIAM Journal on Computing</searchLink>. 2005, Vol. 35 Issue 2, p341. 18p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Memory+hierarchy+%28Computer+science%29%22">Memory hierarchy (Computer science)</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+storage+devices%22">Computer storage devices</searchLink><br /><searchLink fieldCode="DE" term="%22Data+transmission+systems%22">Data transmission systems</searchLink><br /><searchLink fieldCode="DE" term="%22Digital+communications%22">Digital communications</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+input-output+equipment%22">Computer input-output equipment</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: This paper presents two dynamic search trees attaining near-optimal performance on any hierarchical memory. The data structures are independent of the parameters of the memory hierarchy, e.g., the number of memory levels, the block-transfer size at each level, and the relative speeds of memory levels. The performance is analyzed in terms of the number of memory transfers between two memory levels with an arbitrary block-transfer size of B; this analysis can then be applied to every adjacent pair of levels in a multilevel memory hierarchy. Both search trees match the optimal search bound of $\Theta(1+\log_{B+1}N)$ memory transfers. This bound is also achieved by the classic B-tree data structure on a two-level memory hierarchy with a known block-transfer size B. The first search tree supports insertions and deletions in $\Theta(1+\log_{B+1}N)$ amortized memory transfers, which matches the B-tree's worst-case bounds. The second search tree supports scanning S consecutive elements optimally in $\Theta(1+S/B)$ memory transfers and supports insertions and deletions in $\Theta(1+\log_{B+1}N + \frac{\log^2N}{B})$ amortized memory transfers, matching the performance of the B-tree for $B = \Omega(\log N \log\log N)$. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of SIAM Journal on Computing is the property of Society for Industrial & Applied Mathematics and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=19072030
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1137/S0097539701389956
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 18
        StartPage: 341
    Subjects:
      – SubjectFull: Memory hierarchy (Computer science)
        Type: general
      – SubjectFull: Computer storage devices
        Type: general
      – SubjectFull: Data transmission systems
        Type: general
      – SubjectFull: Digital communications
        Type: general
      – SubjectFull: Computer input-output equipment
        Type: general
    Titles:
      – TitleFull: Cache-Oblivious B-Trees.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Bender, Michael A.
      – PersonEntity:
          Name:
            NameFull: Demaine, Erik D.
      – PersonEntity:
          Name:
            NameFull: Farach-Colton, Martin
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 08
              M: 12
              Text: 2005
              Type: published
              Y: 2005
          Identifiers:
            – Type: issn-print
              Value: 00975397
          Numbering:
            – Type: volume
              Value: 35
            – Type: issue
              Value: 2
          Titles:
            – TitleFull: SIAM Journal on Computing
              Type: main
ResultId 1