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Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM.

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Title: Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM.
Authors: Chowdhury, Barnali1 (AUTHOR) barnali92.cse@gmail.com, Awasthi, Shashank2 (AUTHOR) shashank.1801@gmail.com, Metya, Sanjeev Kumar1 (AUTHOR) smetya@gmail.com
Source: Circuits, Systems & Signal Processing. Jan2026, Vol. 45 Issue 1, p364-392. 29p.
Subjects: Reversible computing, Random access memory, Quantum gates, Quantum computing, Nanotechnology, Computational complexity
Abstract: Reversible Computing can boost computational energy efficiency beyond the Landauer limit (kTln2) for irreversible bit operations. It holds great potential for future technologies like ultra-low power ICs, quantum-dot cellular automata (QCA), Quantum Computing, and Nanotechnology. So, there is an ongoing pursuit of efficient reversible circuits by optimizing quantum cost, constant inputs (ancilla), garbage outputs and delay, which heavily depends on the assumptions of underlying technology. In this work, we have proposed an optimized version of Fredkin Gate, one of the extensively used reversible gates for realization of almost all basic operations. We have also displayed some efficient designs of all the latches and flip-flops along with their master slave configurations having optimum performance metrics. The suggested D-FF, being the fundamental block of memory is used to explore the realization of a Reversible Random Access Memory (RRAM) along with a few new arrangements of its constituents like D Flip Flop (D-FF) based write authorized master–slave configuration and reversible decoder. The analysis depicting the comparison states that the new design of RRAM has outsmarted the existing works in terms of performance variables including hardware complexity. [ABSTRACT FROM AUTHOR]
Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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Header DbId: egs
DbLabel: Engineering Source
An: 191289063
AccessLevel: 6
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PubTypeId: academicJournal
PreciseRelevancyScore: 0
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Items – Name: Title
  Label: Title
  Group: Ti
  Data: Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Chowdhury%2C+Barnali%22">Chowdhury, Barnali</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> barnali92.cse@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Awasthi%2C+Shashank%22">Awasthi, Shashank</searchLink><relatesTo>2</relatesTo> (AUTHOR)<i> shashank.1801@gmail.com</i><br /><searchLink fieldCode="AR" term="%22Metya%2C+Sanjeev+Kumar%22">Metya, Sanjeev Kumar</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> smetya@gmail.com</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22Circuits%2C+Systems+%26+Signal+Processing%22">Circuits, Systems & Signal Processing</searchLink>. Jan2026, Vol. 45 Issue 1, p364-392. 29p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Reversible+computing%22">Reversible computing</searchLink><br /><searchLink fieldCode="DE" term="%22Random+access+memory%22">Random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Quantum+gates%22">Quantum gates</searchLink><br /><searchLink fieldCode="DE" term="%22Quantum+computing%22">Quantum computing</searchLink><br /><searchLink fieldCode="DE" term="%22Nanotechnology%22">Nanotechnology</searchLink><br /><searchLink fieldCode="DE" term="%22Computational+complexity%22">Computational complexity</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Reversible Computing can boost computational energy efficiency beyond the Landauer limit (kTln2) for irreversible bit operations. It holds great potential for future technologies like ultra-low power ICs, quantum-dot cellular automata (QCA), Quantum Computing, and Nanotechnology. So, there is an ongoing pursuit of efficient reversible circuits by optimizing quantum cost, constant inputs (ancilla), garbage outputs and delay, which heavily depends on the assumptions of underlying technology. In this work, we have proposed an optimized version of Fredkin Gate, one of the extensively used reversible gates for realization of almost all basic operations. We have also displayed some efficient designs of all the latches and flip-flops along with their master slave configurations having optimum performance metrics. The suggested D-FF, being the fundamental block of memory is used to explore the realization of a Reversible Random Access Memory (RRAM) along with a few new arrangements of its constituents like D Flip Flop (D-FF) based write authorized master–slave configuration and reversible decoder. The analysis depicting the comparison states that the new design of RRAM has outsmarted the existing works in terms of performance variables including hardware complexity. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Circuits, Systems & Signal Processing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1007/s00034-025-03086-w
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 29
        StartPage: 364
    Subjects:
      – SubjectFull: Reversible computing
        Type: general
      – SubjectFull: Random access memory
        Type: general
      – SubjectFull: Quantum gates
        Type: general
      – SubjectFull: Quantum computing
        Type: general
      – SubjectFull: Nanotechnology
        Type: general
      – SubjectFull: Computational complexity
        Type: general
    Titles:
      – TitleFull: Optimized Fredkin Gate and its Application to Design an Ancilla-Delay-Cost Efficient (2i∗j) Reversible RAM.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Chowdhury, Barnali
      – PersonEntity:
          Name:
            NameFull: Awasthi, Shashank
      – PersonEntity:
          Name:
            NameFull: Metya, Sanjeev Kumar
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 01
              Text: Jan2026
              Type: published
              Y: 2026
          Identifiers:
            – Type: issn-print
              Value: 0278081X
          Numbering:
            – Type: volume
              Value: 45
            – Type: issue
              Value: 1
          Titles:
            – TitleFull: Circuits, Systems & Signal Processing
              Type: main
ResultId 1