Functional design and implementation of the CiADS power supply master controller based on System-on-Chip.

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Title: Functional design and implementation of the CiADS power supply master controller based on System-on-Chip.
Authors: Lyu, Wenqi1,2,3 (AUTHOR), He, Yuan1 (AUTHOR) hey@impcas.ac.cn, Chen, Ximeng2 (AUTHOR), Linghu, QingQing1,3 (AUTHOR), Zhou, Zhongzu1 (AUTHOR), Wang, Zhijun1 (AUTHOR), Zhao, Jiang1 (AUTHOR), Zhou, Detai1 (AUTHOR), Xue, Zongheng1 (AUTHOR)
Source: Nuclear Instruments & Methods in Physics Research Section A. May2026, Vol. 1085, pN.PAG-N.PAG. 1p.
Subjects: Systems on a chip, Accelerator-driven systems, Accelerator magnets, Reliability in engineering, Electricity, Redundancy in engineering, Fault tolerance (Engineering)
Abstract: Superconducting linear accelerators in Accelerator-Driven Subcritical Systems (ADS) demand very high availability, as unplanned beam trips can endanger the spallation target and reactor. To address reliability and protection needs at the China Initiative Accelerator-Driven Subcritical System (CiADS) facility, we design and validate a System-on-Chip (SoC)-based dual-redundant master controller for magnet power supplies. The controller integrates: (i) an FPGA-resident finite-state-machine (FSM) fast-protection core for superconducting and normal-conducting magnets; (ii) a dual-master hot-standby mechanism; (iii) N +1 current-sharing with module-failure compensation; and (iv) a triggered fault-snapshot pipeline with EPICS integration. Experiments on the HIAF-iLinac testbed show failover of 500 ± 20 ms, seamless switchover with no output disturbance, <30 % CAN-bus utilization, and fault snapshots that match oscilloscope captures. These results indicate that the SoC-based controller meets CiADS protection and redundancy requirements while improving determinism, maintainability, and long-term reliability over conventional PLC/PC architectures, providing a reusable reference design for future megawatt-scale ADS facilities. [ABSTRACT FROM AUTHOR]
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Abstract:Superconducting linear accelerators in Accelerator-Driven Subcritical Systems (ADS) demand very high availability, as unplanned beam trips can endanger the spallation target and reactor. To address reliability and protection needs at the China Initiative Accelerator-Driven Subcritical System (CiADS) facility, we design and validate a System-on-Chip (SoC)-based dual-redundant master controller for magnet power supplies. The controller integrates: (i) an FPGA-resident finite-state-machine (FSM) fast-protection core for superconducting and normal-conducting magnets; (ii) a dual-master hot-standby mechanism; (iii) N +1 current-sharing with module-failure compensation; and (iv) a triggered fault-snapshot pipeline with EPICS integration. Experiments on the HIAF-iLinac testbed show failover of 500 ± 20 ms, seamless switchover with no output disturbance, <30 % CAN-bus utilization, and fault snapshots that match oscilloscope captures. These results indicate that the SoC-based controller meets CiADS protection and redundancy requirements while improving determinism, maintainability, and long-term reliability over conventional PLC/PC architectures, providing a reusable reference design for future megawatt-scale ADS facilities. [ABSTRACT FROM AUTHOR]
ISSN:01689002
DOI:10.1016/j.nima.2026.171276