A novel approach for performance improvements of TSV and TTSV of 3D IC through thermoelectric effect and mechanical reliability analysis.
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| Title: | A novel approach for performance improvements of TSV and TTSV of 3D IC through thermoelectric effect and mechanical reliability analysis. |
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| Authors: | Chaudhuri, Debika1 (AUTHOR) debika.chaudhuri@gmail.com, Rahaman, Hafizur2 (AUTHOR), Ghosh, Tamal1 (AUTHOR) |
| Source: | Sādhanā: Academy Proceedings in Engineering Sciences. Jun2026, Vol. 51 Issue 2, p1-10. 10p. |
| Subjects: | Through-silicon via, Three-dimensional integrated circuits, Reliability in engineering, Thermoelectric effects, Finite element method, Thermal stresses |
| Abstract: | In modern three-dimensional integrated circuits (3D ICs), one of the most popular and essential structures is through silicon via (TSV), although there is a significant concern about its reliability. In this endeavor, to ensure the reduction of mechanical reliability problems, a model of 3D ICs having TSV and thermal through silicon via (TTSV) structures is proposed to achieve design optimization. In this study, a complete thermo-mechanical stress induced by TSV is analyzed for the proposed structure under high temperatures and current environments using the finite element method (FEM). Furthermore, the effects of TSV diameter, TTSV diameter, pitch size and SiO2 liner were analyzed to achieve electrical and thermomechanical reliability. Proper TSV parameter selection and TTSV placement are recommended for reliability and heat mitigation. Our results demonstrate the effectiveness of the proposed model in mitigating heat with efficient signal transfer. [ABSTRACT FROM AUTHOR] |
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| Database: | Engineering Source |
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| Abstract: | In modern three-dimensional integrated circuits (3D ICs), one of the most popular and essential structures is through silicon via (TSV), although there is a significant concern about its reliability. In this endeavor, to ensure the reduction of mechanical reliability problems, a model of 3D ICs having TSV and thermal through silicon via (TTSV) structures is proposed to achieve design optimization. In this study, a complete thermo-mechanical stress induced by TSV is analyzed for the proposed structure under high temperatures and current environments using the finite element method (FEM). Furthermore, the effects of TSV diameter, TTSV diameter, pitch size and SiO2 liner were analyzed to achieve electrical and thermomechanical reliability. Proper TSV parameter selection and TTSV placement are recommended for reliability and heat mitigation. Our results demonstrate the effectiveness of the proposed model in mitigating heat with efficient signal transfer. [ABSTRACT FROM AUTHOR] |
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| ISSN: | 02562499 |
| DOI: | 10.1007/s12046-026-03073-0 |
