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Electrostatic Surface and Bulk Potential Modeling of Snapback Behavior of n-FET Protection Devices.

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Title: Electrostatic Surface and Bulk Potential Modeling of Snapback Behavior of n-FET Protection Devices.
Authors: Kumar, Prabhat1 (AUTHOR) prabhat.ece.2203007@iiitbh.ac.in, Sinha, Dheeraj Kumar1 (AUTHOR), Kumar, Sanjay1 (AUTHOR)
Source: Journal of Electronic Materials. Jul2026, Vol. 55 Issue 7, p6400-6412. 13p.
Subjects: Electrostatics, Electrostatic discharges, Conformal mapping, Transistors, Electrons, Bipolar transistors
Abstract: In this article, electrostatic surface and bulk potential modeling of the pre- and post-snapback behavior of n-type field-effect transistor (n-FET)-based protection devices is derived under ultrafast current pulsing conditions. In the design of electrostatic discharge (ESD) protection devices, the relevant physical and analytical models are of the utmost importance. Therefore, the electrical characteristics of a gate-grounded N-channel metal–oxide–semiconductor (GG-NMOS) transistor under ESD pulsing conditions are physically and mathematically modeled for fast circuit simulation using the conformal mapping method with appropriate boundary conditions in all the regions of the n-FET structure. The closed-form expressions for the surface and bulk electrostatic potential and electric field before and after first snapback are compared with technology computer-aided design (TCAD) device simulation results, revealing good agreement between them. This work also demonstrates the process of bipolar turn-on through a device simulation tool and validates our proposed physical model with the derived analytical expressions. Further, the concept of current gain (i.e., β) is applied to describe the coupling of electron and hole injection and subsequently the role of bulk bipolar turn-on. Finally, the first snapback mechanism in the GG-NMOS is investigated with respect to different channel lengths. [ABSTRACT FROM AUTHOR]
Copyright of Journal of Electronic Materials is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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Header DbId: egs
DbLabel: Engineering Source
An: 194546607
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PubType: Academic Journal
PubTypeId: academicJournal
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  Data: Electrostatic Surface and Bulk Potential Modeling of Snapback Behavior of n-FET Protection Devices.
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  Data: <searchLink fieldCode="AR" term="%22Kumar%2C+Prabhat%22">Kumar, Prabhat</searchLink><relatesTo>1</relatesTo> (AUTHOR)<i> prabhat.ece.2203007@iiitbh.ac.in</i><br /><searchLink fieldCode="AR" term="%22Sinha%2C+Dheeraj+Kumar%22">Sinha, Dheeraj Kumar</searchLink><relatesTo>1</relatesTo> (AUTHOR)<br /><searchLink fieldCode="AR" term="%22Kumar%2C+Sanjay%22">Kumar, Sanjay</searchLink><relatesTo>1</relatesTo> (AUTHOR)
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  Data: <searchLink fieldCode="JN" term="%22Journal+of+Electronic+Materials%22">Journal of Electronic Materials</searchLink>. Jul2026, Vol. 55 Issue 7, p6400-6412. 13p.
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  Data: <searchLink fieldCode="DE" term="%22Electrostatics%22">Electrostatics</searchLink><br /><searchLink fieldCode="DE" term="%22Electrostatic+discharges%22">Electrostatic discharges</searchLink><br /><searchLink fieldCode="DE" term="%22Conformal+mapping%22">Conformal mapping</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Electrons%22">Electrons</searchLink><br /><searchLink fieldCode="DE" term="%22Bipolar+transistors%22">Bipolar transistors</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: In this article, electrostatic surface and bulk potential modeling of the pre- and post-snapback behavior of n-type field-effect transistor (n-FET)-based protection devices is derived under ultrafast current pulsing conditions. In the design of electrostatic discharge (ESD) protection devices, the relevant physical and analytical models are of the utmost importance. Therefore, the electrical characteristics of a gate-grounded N-channel metal–oxide–semiconductor (GG-NMOS) transistor under ESD pulsing conditions are physically and mathematically modeled for fast circuit simulation using the conformal mapping method with appropriate boundary conditions in all the regions of the n-FET structure. The closed-form expressions for the surface and bulk electrostatic potential and electric field before and after first snapback are compared with technology computer-aided design (TCAD) device simulation results, revealing good agreement between them. This work also demonstrates the process of bipolar turn-on through a device simulation tool and validates our proposed physical model with the derived analytical expressions. Further, the concept of current gain (i.e., β) is applied to describe the coupling of electron and hole injection and subsequently the role of bulk bipolar turn-on. Finally, the first snapback mechanism in the GG-NMOS is investigated with respect to different channel lengths. [ABSTRACT FROM AUTHOR]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Journal of Electronic Materials is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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      – Type: doi
        Value: 10.1007/s11664-026-12926-7
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      – Code: eng
        Text: English
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      Pagination:
        PageCount: 13
        StartPage: 6400
    Subjects:
      – SubjectFull: Electrostatics
        Type: general
      – SubjectFull: Electrostatic discharges
        Type: general
      – SubjectFull: Conformal mapping
        Type: general
      – SubjectFull: Transistors
        Type: general
      – SubjectFull: Electrons
        Type: general
      – SubjectFull: Bipolar transistors
        Type: general
    Titles:
      – TitleFull: Electrostatic Surface and Bulk Potential Modeling of Snapback Behavior of n-FET Protection Devices.
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            NameFull: Kumar, Prabhat
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            NameFull: Sinha, Dheeraj Kumar
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            NameFull: Kumar, Sanjay
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            – D: 01
              M: 07
              Text: Jul2026
              Type: published
              Y: 2026
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