APA (7th ed.) Citation

Prasath, C. A., & Shankar, C. G. (2026). Low-Power Design and Estimation of VLSI CMOS Architectures Using approximate Arithmetic for Digital Filter Applications. Circuits, Systems & Signal Processing, 45(7), 5483. https://doi.org/10.1007/s00034-025-03371-8

Chicago Style (17th ed.) Citation

Prasath, C. Arun, and C. Gowri Shankar. "Low-Power Design and Estimation of VLSI CMOS Architectures Using Approximate Arithmetic for Digital Filter Applications." Circuits, Systems & Signal Processing 45, no. 7 (2026): 5483. https://doi.org/10.1007/s00034-025-03371-8.

MLA (9th ed.) Citation

Prasath, C. Arun, and C. Gowri Shankar. "Low-Power Design and Estimation of VLSI CMOS Architectures Using Approximate Arithmetic for Digital Filter Applications." Circuits, Systems & Signal Processing, vol. 45, no. 7, 2026, p. 5483, https://doi.org/10.1007/s00034-025-03371-8.