APA (7th ed.) Citation

YANG, X., JIANG, J., & WANG, Y. (2026). Implementation and Performance Analysis of a Multi-Stage BIOS Boot Process for D1-H RISC-V Systems. Technical Gazette / Tehnički Vjesnik, 33(3), 949. https://doi.org/10.17559/TV-20241010002048

Chicago Style (17th ed.) Citation

YANG, Xuanyuan, Jianwu JIANG, and Yihuai WANG. "Implementation and Performance Analysis of a Multi-Stage BIOS Boot Process for D1-H RISC-V Systems." Technical Gazette / Tehnički Vjesnik 33, no. 3 (2026): 949. https://doi.org/10.17559/TV-20241010002048.

MLA (9th ed.) Citation

YANG, Xuanyuan, et al. "Implementation and Performance Analysis of a Multi-Stage BIOS Boot Process for D1-H RISC-V Systems." Technical Gazette / Tehnički Vjesnik, vol. 33, no. 3, 2026, p. 949, https://doi.org/10.17559/TV-20241010002048.