Effect of gate length in InAs/AlSb HEMTs biased for low power or high gain

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Title: Effect of gate length in InAs/AlSb HEMTs biased for low power or high gain
Authors: Borg, Malin1, Lefebvre, Eric1, Malmkvist, Mikael1, Desplanque, Ludovic2, Wallart, Xavier2, Roelens, Yannick2, Dambrine, Gilles2, Cappy, Alain2, Bollaert, Sylvain2, Grahn, Jan1 jan.grahn@chalmers.se
Source: Solid-State Electronics. May2008, Vol. 52 Issue 5, p775-781. 7p.
Subjects: Solid state electronics, Electronics, Solid state physics, Electrical engineering, Physics
Abstract: Abstract: The effect of gate-length variation on DC and RF performance of InAs/AlSb HEMTs, biased for low DC power consumption or high gain, is reported. Simultaneously fabricated devices, with gate lengths between 225nm and 335nm, have been compared. DC measurements revealed higher output conductance g ds and slightly increased impact ionization with reduced gate length. When reducing the gate length from 335nm to 225nm, the DC power consumption was reduced by approximately 80% at an fT of 120GHz. Furthermore, a 225nm gate-length HEMT biased for high gain exhibited an extrinsic fT of 165GHz and an extrinsic f max of 115GHz, at a DC power consumption of 100mW/mm. When biased for low DC power consumption of 20mW/mm the same HEMT exhibited an extrinsic fT and f max of 120GHz and 110GHz, respectively. [Copyright &y& Elsevier]
Copyright of Solid-State Electronics is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
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  Data: Effect of gate length in InAs/AlSb HEMTs biased for low power or high gain
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  Data: <searchLink fieldCode="JN" term="%22Solid-State+Electronics%22">Solid-State Electronics</searchLink>. May2008, Vol. 52 Issue 5, p775-781. 7p.
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  Data: Abstract: The effect of gate-length variation on DC and RF performance of InAs/AlSb HEMTs, biased for low DC power consumption or high gain, is reported. Simultaneously fabricated devices, with gate lengths between 225nm and 335nm, have been compared. DC measurements revealed higher output conductance g ds and slightly increased impact ionization with reduced gate length. When reducing the gate length from 335nm to 225nm, the DC power consumption was reduced by approximately 80% at an fT of 120GHz. Furthermore, a 225nm gate-length HEMT biased for high gain exhibited an extrinsic fT of 165GHz and an extrinsic f max of 115GHz, at a DC power consumption of 100mW/mm. When biased for low DC power consumption of 20mW/mm the same HEMT exhibited an extrinsic fT and f max of 120GHz and 110GHz, respectively. [Copyright &y& Elsevier]
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  Data: <i>Copyright of Solid-State Electronics is the property of Pergamon Press - An Imprint of Elsevier Science and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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