Nebelung: Execution Environment for Transactional OpenMP.
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| Title: | Nebelung: Execution Environment for Transactional OpenMP. |
|---|---|
| Authors: | Milovanović, Miloš1,2 milos.milovanovic@bsc.es, Ferrer, Roger1,2 roger.ferrer@bsc.es, Gajinov, Vladimir1,2, Unsal, Osman1 osman.unsal@bsc.es, Cristal, Adrian1 adrian.cristal@bsc.es, Ayguadé, Eduard2 eduard@ac.upc.edu, Valero, Mateo2 mateo@ac.upc.edu |
| Source: | International Journal of Parallel Programming. Jun2008, Vol. 36 Issue 3, p326-346. 21p. 13 Diagrams, 4 Graphs. |
| Subjects: | Multiprocessors, Multiprogramming (Electronic computers), Array processors, Distributed shared memory, Multi-Batch (Electronic computer system), Programming languages, Electronic systems, Computers, Parallel processing |
| Abstract: | Future generations of Chip Multiprocessors (CMP) will provide dozens or even hundreds of cores inside the chip. Writing applications that benefit from the massive computational power offered by these chips is not going to be an easy task for mainstream programmers who are used to sequential algorithms rather than parallel ones. This paper explores the possibility of using Transactional Memory (TM) in OpenMP, the industrial standard for writing parallel programs on shared-memory architectures, for C, C++ and Fortran. One of the major complexities in writing OpenMP applications is the use of critical regions (locks), atomic regions and barriers to synchronize the execution of parallel activities in threads. TM has been proposed as a mechanism that abstracts some of the complexities associated with concurrent access to shared data while enabling scalable performance. The paper presents a first proof-of-concept implementation of OpenMP with TM. Some language extensions to OpenMP are proposed to express transactions. These extensions are implemented in our source-to-source OpenMP Mercurium compiler and our Software Transactional Memory (STM) runtime system Nebelung that supports the code generated by Mercurium. Hardware Transactional Memory (HTM) or Hardware-assisted STM (HaSTM) are seen as possible paths to make the tandem TM-OpenMP more scalable. In the evaluation section we show the preliminary results. The paper finishes with a set of open issues that still need to be addressed, either in OpenMP or in the hardware/software implementations of TM. [ABSTRACT FROM AUTHOR] |
| Copyright of International Journal of Parallel Programming is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Links: – Type: pdflink Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 31975614 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Nebelung: Execution Environment for Transactional OpenMP. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Milovanović%2C+Miloš%22">Milovanović, Miloš</searchLink><relatesTo>1,2</relatesTo><i> milos.milovanovic@bsc.es</i><br /><searchLink fieldCode="AR" term="%22Ferrer%2C+Roger%22">Ferrer, Roger</searchLink><relatesTo>1,2</relatesTo><i> roger.ferrer@bsc.es</i><br /><searchLink fieldCode="AR" term="%22Gajinov%2C+Vladimir%22">Gajinov, Vladimir</searchLink><relatesTo>1,2</relatesTo><br /><searchLink fieldCode="AR" term="%22Unsal%2C+Osman%22">Unsal, Osman</searchLink><relatesTo>1</relatesTo><i> osman.unsal@bsc.es</i><br /><searchLink fieldCode="AR" term="%22Cristal%2C+Adrian%22">Cristal, Adrian</searchLink><relatesTo>1</relatesTo><i> adrian.cristal@bsc.es</i><br /><searchLink fieldCode="AR" term="%22Ayguadé%2C+Eduard%22">Ayguadé, Eduard</searchLink><relatesTo>2</relatesTo><i> eduard@ac.upc.edu</i><br /><searchLink fieldCode="AR" term="%22Valero%2C+Mateo%22">Valero, Mateo</searchLink><relatesTo>2</relatesTo><i> mateo@ac.upc.edu</i> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Parallel+Programming%22">International Journal of Parallel Programming</searchLink>. Jun2008, Vol. 36 Issue 3, p326-346. 21p. 13 Diagrams, 4 Graphs. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Multiprocessors%22">Multiprocessors</searchLink><br /><searchLink fieldCode="DE" term="%22Multiprogramming+%28Electronic+computers%29%22">Multiprogramming (Electronic computers)</searchLink><br /><searchLink fieldCode="DE" term="%22Array+processors%22">Array processors</searchLink><br /><searchLink fieldCode="DE" term="%22Distributed+shared+memory%22">Distributed shared memory</searchLink><br /><searchLink fieldCode="DE" term="%22Multi-Batch+%28Electronic+computer+system%29%22">Multi-Batch (Electronic computer system)</searchLink><br /><searchLink fieldCode="DE" term="%22Programming+languages%22">Programming languages</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+systems%22">Electronic systems</searchLink><br /><searchLink fieldCode="DE" term="%22Computers%22">Computers</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+processing%22">Parallel processing</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Future generations of Chip Multiprocessors (CMP) will provide dozens or even hundreds of cores inside the chip. Writing applications that benefit from the massive computational power offered by these chips is not going to be an easy task for mainstream programmers who are used to sequential algorithms rather than parallel ones. This paper explores the possibility of using Transactional Memory (TM) in OpenMP, the industrial standard for writing parallel programs on shared-memory architectures, for C, C++ and Fortran. One of the major complexities in writing OpenMP applications is the use of critical regions (locks), atomic regions and barriers to synchronize the execution of parallel activities in threads. TM has been proposed as a mechanism that abstracts some of the complexities associated with concurrent access to shared data while enabling scalable performance. The paper presents a first proof-of-concept implementation of OpenMP with TM. Some language extensions to OpenMP are proposed to express transactions. These extensions are implemented in our source-to-source OpenMP Mercurium compiler and our Software Transactional Memory (STM) runtime system Nebelung that supports the code generated by Mercurium. Hardware Transactional Memory (HTM) or Hardware-assisted STM (HaSTM) are seen as possible paths to make the tandem TM-OpenMP more scalable. In the evaluation section we show the preliminary results. The paper finishes with a set of open issues that still need to be addressed, either in OpenMP or in the hardware/software implementations of TM. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of International Journal of Parallel Programming is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1007/s10766-008-0073-6 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 21 StartPage: 326 Subjects: – SubjectFull: Multiprocessors Type: general – SubjectFull: Multiprogramming (Electronic computers) Type: general – SubjectFull: Array processors Type: general – SubjectFull: Distributed shared memory Type: general – SubjectFull: Multi-Batch (Electronic computer system) Type: general – SubjectFull: Programming languages Type: general – SubjectFull: Electronic systems Type: general – SubjectFull: Computers Type: general – SubjectFull: Parallel processing Type: general Titles: – TitleFull: Nebelung: Execution Environment for Transactional OpenMP. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Milovanović, Miloš – PersonEntity: Name: NameFull: Ferrer, Roger – PersonEntity: Name: NameFull: Gajinov, Vladimir – PersonEntity: Name: NameFull: Unsal, Osman – PersonEntity: Name: NameFull: Cristal, Adrian – PersonEntity: Name: NameFull: Ayguadé, Eduard – PersonEntity: Name: NameFull: Valero, Mateo IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 06 Text: Jun2008 Type: published Y: 2008 Identifiers: – Type: issn-print Value: 08857458 Numbering: – Type: volume Value: 36 – Type: issue Value: 3 Titles: – TitleFull: International Journal of Parallel Programming Type: main |
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