View in EDS

Design and performance of speculative flow control for high-radix datacenter interconnect switches

Saved in:
Bibliographic Details
Title: Design and performance of speculative flow control for high-radix datacenter interconnect switches
Authors: Minkenberg, Cyriel sil@zurich.ibm.com, Gusat, Mitchell1 mig@zurich.ibm.com
Source: Journal of Parallel & Distributed Computing. Aug2009, Vol. 69 Issue 8, p680-695. 16p.
Subjects: Switching theory, Connection machines, Performance evaluation, Computer network architectures, Bandwidths, Kim, J., Ports (Electronic computer system), Simulation methods & models, Buffer storage (Computer science)
Abstract: Abstract: High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and low cost than low-radix switches [J. Kim, W.J. Dally, B. Towles, A.K. Gupta, Microarchitecture of a high-radix router, in: Proc. ISCA 2005, Madison, WI, 2005]. Unfortunately, most existing switch architectures do not scale well to a large number of ports, for example, the complexity of the buffered crossbar architecture scales quadratically with the number of ports. Compounded with support for long round-trip times and many virtual channels, the overall buffer requirements limit the feasibility of such switches to modest port counts. Compromising on the buffer sizing leads to a drastic increase in latency and reduction in throughput, as long as traditional credit flow control is employed at the link level. We propose a novel link-level flow control protocol that enables high-performance scalable switches that are based on the increasingly popular buffered crossbar architecture, to scale to higher port counts without sacrificing performance. By combining credited and speculative transmission, this scheme achieves reliable delivery, low latency, and high throughput, even with crosspoint buffers that are significantly smaller than the round-trip time. The proposed scheme substantially reduces message latency and improves throughput of partially buffered crossbar switches loaded with synthetic uniform and non-uniform bursty traffic. Moreover, simulations replaying traces of several typical MPI applications demonstrate communication speedup factors of 2 to 10 times. [Copyright &y& Elsevier]
Copyright of Journal of Parallel & Distributed Computing is the property of Academic Press Inc. and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
FullText Text:
  Availability: 0
Header DbId: egs
DbLabel: Engineering Source
An: 42100316
AccessLevel: 6
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Design and performance of speculative flow control for high-radix datacenter interconnect switches
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AR" term="%22Minkenberg%2C+Cyriel%22">Minkenberg, Cyriel</searchLink><i> sil@zurich.ibm.com</i><br /><searchLink fieldCode="AR" term="%22Gusat%2C+Mitchell%22">Gusat, Mitchell</searchLink><relatesTo>1</relatesTo><i> mig@zurich.ibm.com</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22Journal+of+Parallel+%26+Distributed+Computing%22">Journal of Parallel & Distributed Computing</searchLink>. Aug2009, Vol. 69 Issue 8, p680-695. 16p.
– Name: Subject
  Label: Subjects
  Group: Su
  Data: <searchLink fieldCode="DE" term="%22Switching+theory%22">Switching theory</searchLink><br /><searchLink fieldCode="DE" term="%22Connection+machines%22">Connection machines</searchLink><br /><searchLink fieldCode="DE" term="%22Performance+evaluation%22">Performance evaluation</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+network+architectures%22">Computer network architectures</searchLink><br /><searchLink fieldCode="DE" term="%22Bandwidths%22">Bandwidths</searchLink><br /><searchLink fieldCode="DE" term="%22Kim%2C+J%2E%22">Kim, J.</searchLink><br /><searchLink fieldCode="DE" term="%22Ports+%28Electronic+computer+system%29%22">Ports (Electronic computer system)</searchLink><br /><searchLink fieldCode="DE" term="%22Simulation+methods+%26+models%22">Simulation methods & models</searchLink><br /><searchLink fieldCode="DE" term="%22Buffer+storage+%28Computer+science%29%22">Buffer storage (Computer science)</searchLink>
– Name: Abstract
  Label: Abstract
  Group: Ab
  Data: Abstract: High-radix switches are desirable building blocks for large computer interconnection networks, because they are more suitable to convert chip I/O bandwidth into low latency and low cost than low-radix switches [J. Kim, W.J. Dally, B. Towles, A.K. Gupta, Microarchitecture of a high-radix router, in: Proc. ISCA 2005, Madison, WI, 2005]. Unfortunately, most existing switch architectures do not scale well to a large number of ports, for example, the complexity of the buffered crossbar architecture scales quadratically with the number of ports. Compounded with support for long round-trip times and many virtual channels, the overall buffer requirements limit the feasibility of such switches to modest port counts. Compromising on the buffer sizing leads to a drastic increase in latency and reduction in throughput, as long as traditional credit flow control is employed at the link level. We propose a novel link-level flow control protocol that enables high-performance scalable switches that are based on the increasingly popular buffered crossbar architecture, to scale to higher port counts without sacrificing performance. By combining credited and speculative transmission, this scheme achieves reliable delivery, low latency, and high throughput, even with crosspoint buffers that are significantly smaller than the round-trip time. The proposed scheme substantially reduces message latency and improves throughput of partially buffered crossbar switches loaded with synthetic uniform and non-uniform bursty traffic. Moreover, simulations replaying traces of several typical MPI applications demonstrate communication speedup factors of 2 to 10 times. [Copyright &y& Elsevier]
– Name: AbstractSuppliedCopyright
  Label:
  Group: Ab
  Data: <i>Copyright of Journal of Parallel & Distributed Computing is the property of Academic Press Inc. and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=42100316
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.1016/j.jpdc.2008.07.014
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 16
        StartPage: 680
    Subjects:
      – SubjectFull: Switching theory
        Type: general
      – SubjectFull: Connection machines
        Type: general
      – SubjectFull: Performance evaluation
        Type: general
      – SubjectFull: Computer network architectures
        Type: general
      – SubjectFull: Bandwidths
        Type: general
      – SubjectFull: Kim, J.
        Type: general
      – SubjectFull: Ports (Electronic computer system)
        Type: general
      – SubjectFull: Simulation methods & models
        Type: general
      – SubjectFull: Buffer storage (Computer science)
        Type: general
    Titles:
      – TitleFull: Design and performance of speculative flow control for high-radix datacenter interconnect switches
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Minkenberg, Cyriel
      – PersonEntity:
          Name:
            NameFull: Gusat, Mitchell
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 08
              Text: Aug2009
              Type: published
              Y: 2009
          Identifiers:
            – Type: issn-print
              Value: 07437315
          Numbering:
            – Type: volume
              Value: 69
            – Type: issue
              Value: 8
          Titles:
            – TitleFull: Journal of Parallel & Distributed Computing
              Type: main
ResultId 1