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Parallel loop generation and scheduling.

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Title: Parallel loop generation and scheduling.
Authors: Lotfi, Shahriar1 shahriar_lotfi@iust.ac.ir, Parsa, Saeed2 parsa@iust.ac.ir
Source: Journal of Supercomputing. Dec2009, Vol. 50 Issue 3, p289-306. 18p. 13 Diagrams, 1 Chart, 1 Graph.
Subjects: Loop tiling (Computer science), Parallel processing, Computer memory management, Computer science, Electronic data processing
Abstract: Loop tiling is an efficient loop transformation, mainly applied to detect coarse-grained parallelism in loops. It is a difficult task to apply n-dimensional non-rectangular tiles to generate parallel loops. This paper offers an efficient scheme to apply non-rectangular n-dimensional tiles in non-rectangular iteration spaces, to generate parallel loops. In order to exploit wavefront parallelism efficiently, all the tiles with equal sum of coordinates are assumed to reside on the same wavefront. Also, in order to assign parallelepiped tiles on each wavefront to different processors, an improved block scheduling strategy is offered in this paper. [ABSTRACT FROM AUTHOR]
Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)
Database: Engineering Source
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DbLabel: Engineering Source
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PubType: Academic Journal
PubTypeId: academicJournal
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  Data: Parallel loop generation and scheduling.
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  Data: <searchLink fieldCode="AR" term="%22Lotfi%2C+Shahriar%22">Lotfi, Shahriar</searchLink><relatesTo>1</relatesTo><i> shahriar_lotfi@iust.ac.ir</i><br /><searchLink fieldCode="AR" term="%22Parsa%2C+Saeed%22">Parsa, Saeed</searchLink><relatesTo>2</relatesTo><i> parsa@iust.ac.ir</i>
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  Data: <searchLink fieldCode="JN" term="%22Journal+of+Supercomputing%22">Journal of Supercomputing</searchLink>. Dec2009, Vol. 50 Issue 3, p289-306. 18p. 13 Diagrams, 1 Chart, 1 Graph.
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  Data: <searchLink fieldCode="DE" term="%22Loop+tiling+%28Computer+science%29%22">Loop tiling (Computer science)</searchLink><br /><searchLink fieldCode="DE" term="%22Parallel+processing%22">Parallel processing</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+memory+management%22">Computer memory management</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+science%22">Computer science</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+data+processing%22">Electronic data processing</searchLink>
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  Data: Loop tiling is an efficient loop transformation, mainly applied to detect coarse-grained parallelism in loops. It is a difficult task to apply n-dimensional non-rectangular tiles to generate parallel loops. This paper offers an efficient scheme to apply non-rectangular n-dimensional tiles in non-rectangular iteration spaces, to generate parallel loops. In order to exploit wavefront parallelism efficiently, all the tiles with equal sum of coordinates are assumed to reside on the same wavefront. Also, in order to assign parallelepiped tiles on each wavefront to different processors, an improved block scheduling strategy is offered in this paper. [ABSTRACT FROM AUTHOR]
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  Data: <i>Copyright of Journal of Supercomputing is the property of Springer Nature and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.)
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        Value: 10.1007/s11227-008-0262-5
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        Text: English
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      – SubjectFull: Parallel processing
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      – SubjectFull: Computer memory management
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      – SubjectFull: Electronic data processing
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      – TitleFull: Parallel loop generation and scheduling.
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              Text: Dec2009
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