A total standard WIP estimation method for wafer fabrication.
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| Title: | A total standard WIP estimation method for wafer fabrication. |
|---|---|
| Authors: | Yu-Hsin Lin, Ching-En Lee |
| Source: | European Journal of Operational Research. 05/16/2001, Vol. 131 Issue 1, p78-94. 17p. 1 Diagram, 13 Charts, 1 Graph. |
| Subjects: | Semiconductor industry, Algorithms, Queuing theory, Network analysis (Planning), Production control |
| Geographic Terms: | Taiwan |
| Abstract: | Proposes a queuing network-based algorithm for estimating the total standard work-in-process (WIP) level so that a fixed-WIP release algorithm control policy can apply. Simulation model of a real-world wafer fabrication factory in Taiwan; Assumptions under the queuing network model. |
| Database: | Engineering Source |
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