Hybrid MOSFET/Driver for Ultra-fast Switching.
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| Title: | Hybrid MOSFET/Driver for Ultra-fast Switching. |
|---|---|
| Authors: | Tang, T.1, Burkhart, C.1 |
| Source: | IEEE Transactions on Dielectrics & Electrical Insulation. Aug2009, Vol. 16 Issue 4, p967-970. 4p. |
| Subjects: | Metal oxide semiconductor field-effect transistors, Switching circuits, Integrated circuits, Semiconductor switches, Field-effect transistors |
| Abstract: | The ultra-fast switching of power MOSFETs, in about 1 ns, is very challenging. This is largely due to the parasitic inductance that is intrinsic to commercial packages used for both MOSFETs and drivers. Parasitic gate and source inductance not only limit the voltage rise time on the MOSFET internal gate structure but can also cause the gate voltage to oscillate. This paper describes a hybrid approach that substantially reduces the parasitic inductance between the driver and MOSFET gate, as well as between the MOSFET source and its external connection. A flip-chip assembly is used to directly attach a die-form power MOSFET and driver on a PCB. The parasitic inductances are significantly reduced by eliminating bond wires and minimizing lead length. The experimental results demonstrate ultra-fast switching of the power MOSFET with excellent control of the gate-source voltage. [ABSTRACT FROM AUTHOR] |
| Copyright of IEEE Transactions on Dielectrics & Electrical Insulation is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 50994775 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Hybrid MOSFET/Driver for Ultra-fast Switching. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Tang%2C+T%2E%22">Tang, T.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Burkhart%2C+C%2E%22">Burkhart, C.</searchLink><relatesTo>1</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Transactions+on+Dielectrics+%26+Electrical+Insulation%22">IEEE Transactions on Dielectrics & Electrical Insulation</searchLink>. Aug2009, Vol. 16 Issue 4, p967-970. 4p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Metal+oxide+semiconductor+field-effect+transistors%22">Metal oxide semiconductor field-effect transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Switching+circuits%22">Switching circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuits%22">Integrated circuits</searchLink><br /><searchLink fieldCode="DE" term="%22Semiconductor+switches%22">Semiconductor switches</searchLink><br /><searchLink fieldCode="DE" term="%22Field-effect+transistors%22">Field-effect transistors</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: The ultra-fast switching of power MOSFETs, in about 1 ns, is very challenging. This is largely due to the parasitic inductance that is intrinsic to commercial packages used for both MOSFETs and drivers. Parasitic gate and source inductance not only limit the voltage rise time on the MOSFET internal gate structure but can also cause the gate voltage to oscillate. This paper describes a hybrid approach that substantially reduces the parasitic inductance between the driver and MOSFET gate, as well as between the MOSFET source and its external connection. A flip-chip assembly is used to directly attach a die-form power MOSFET and driver on a PCB. The parasitic inductances are significantly reduced by eliminating bond wires and minimizing lead length. The experimental results demonstrate ultra-fast switching of the power MOSFET with excellent control of the gate-source voltage. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Transactions on Dielectrics & Electrical Insulation is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/TDEI.2009.5211841 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 4 StartPage: 967 Subjects: – SubjectFull: Metal oxide semiconductor field-effect transistors Type: general – SubjectFull: Switching circuits Type: general – SubjectFull: Integrated circuits Type: general – SubjectFull: Semiconductor switches Type: general – SubjectFull: Field-effect transistors Type: general Titles: – TitleFull: Hybrid MOSFET/Driver for Ultra-fast Switching. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Tang, T. – PersonEntity: Name: NameFull: Burkhart, C. IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2009 Type: published Y: 2009 Identifiers: – Type: issn-print Value: 10709878 Numbering: – Type: volume Value: 16 – Type: issue Value: 4 Titles: – TitleFull: IEEE Transactions on Dielectrics & Electrical Insulation Type: main |
| ResultId | 1 |