The effect of structural design parameters on FPGA-based feed-forward space-time trellis coding-orthogonal frequency division multiplexing channel encoders.
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| Title: | The effect of structural design parameters on FPGA-based feed-forward space-time trellis coding-orthogonal frequency division multiplexing channel encoders. |
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| Authors: | Passas, Georgios1, Freear, Steven1 s.freear@leeds.ac.uk, Fawcett, Darren2 |
| Source: | International Journal of Electronics. Aug2010, Vol. 97 Issue 8, p907-926. 20p. 7 Diagrams, 7 Graphs. |
| Subjects: | Trellis-coded modulation, Electronic modulation, VHDL (Computer hardware description language), Orthogonal frequency division multiplexing, Spacetime |
| Abstract: | Orthogonal frequency division multiplexing (OFDM)-based feed-forward space-time trellis code (FFSTTC) encoders can be synthesised as very high speed integrated circuit hardware description language (VHDL) designs. Evaluation of their FPGA implementation can lead to conclusions that help a designer to decide the optimum implementation, given the encoder structural parameters. VLSI architectures based on 1-bit multipliers and look-up tables (LUTs) are compared in terms of FPGA slices and block RAMs (area), as well as in terms of minimum clock period (speed). Area and speed graphs versus encoder memory order are provided for quadrature phase shift keying (QPSK) and 8 phase shift keying (8-PSK) modulation and two transmit antennas, revealing best implementation under these conditions. The effect of number of modulation bits and transmit antennas on the encoder implementation complexity is also investigated. [ABSTRACT FROM AUTHOR] |
| Copyright of International Journal of Electronics is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 52646642 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: The effect of structural design parameters on FPGA-based feed-forward space-time trellis coding-orthogonal frequency division multiplexing channel encoders. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Passas%2C+Georgios%22">Passas, Georgios</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Freear%2C+Steven%22">Freear, Steven</searchLink><relatesTo>1</relatesTo><i> s.freear@leeds.ac.uk</i><br /><searchLink fieldCode="AR" term="%22Fawcett%2C+Darren%22">Fawcett, Darren</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+Electronics%22">International Journal of Electronics</searchLink>. Aug2010, Vol. 97 Issue 8, p907-926. 20p. 7 Diagrams, 7 Graphs. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Trellis-coded+modulation%22">Trellis-coded modulation</searchLink><br /><searchLink fieldCode="DE" term="%22Electronic+modulation%22">Electronic modulation</searchLink><br /><searchLink fieldCode="DE" term="%22VHDL+%28Computer+hardware+description+language%29%22">VHDL (Computer hardware description language)</searchLink><br /><searchLink fieldCode="DE" term="%22Orthogonal+frequency+division+multiplexing%22">Orthogonal frequency division multiplexing</searchLink><br /><searchLink fieldCode="DE" term="%22Spacetime%22">Spacetime</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Orthogonal frequency division multiplexing (OFDM)-based feed-forward space-time trellis code (FFSTTC) encoders can be synthesised as very high speed integrated circuit hardware description language (VHDL) designs. Evaluation of their FPGA implementation can lead to conclusions that help a designer to decide the optimum implementation, given the encoder structural parameters. VLSI architectures based on 1-bit multipliers and look-up tables (LUTs) are compared in terms of FPGA slices and block RAMs (area), as well as in terms of minimum clock period (speed). Area and speed graphs versus encoder memory order are provided for quadrature phase shift keying (QPSK) and 8 phase shift keying (8-PSK) modulation and two transmit antennas, revealing best implementation under these conditions. The effect of number of modulation bits and transmit antennas on the encoder implementation complexity is also investigated. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of International Journal of Electronics is the property of Taylor & Francis Ltd and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1080/00207211003733346 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 20 StartPage: 907 Subjects: – SubjectFull: Trellis-coded modulation Type: general – SubjectFull: Electronic modulation Type: general – SubjectFull: VHDL (Computer hardware description language) Type: general – SubjectFull: Orthogonal frequency division multiplexing Type: general – SubjectFull: Spacetime Type: general Titles: – TitleFull: The effect of structural design parameters on FPGA-based feed-forward space-time trellis coding-orthogonal frequency division multiplexing channel encoders. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Passas, Georgios – PersonEntity: Name: NameFull: Freear, Steven – PersonEntity: Name: NameFull: Fawcett, Darren IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 08 Text: Aug2010 Type: published Y: 2010 Identifiers: – Type: issn-print Value: 00207217 Numbering: – Type: volume Value: 97 – Type: issue Value: 8 Titles: – TitleFull: International Journal of Electronics Type: main |
| ResultId | 1 |
