Application-Specific Networks-on-Chips Design.

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Bibliographic Details
Title:	Application-Specific Networks-on-Chips Design.
Authors:	Janidarmian, Majid¹ jani@srbiau.ac.ir, Fekr, Atena Roshan² atena.roshanfekr@mail.mcgill.ca, Bokharaei, Vahhab Samadi³ v.samadi@sbu.ac.ir
Source:	IAENG International Journal of Computer Science. Mar2011, Vol. 38 Issue 1, p16-25. 10p.
Subjects:	Networks on a chip, Embedded computer system design & construction, Algorithms, Routing (Computer network management), Computer networks, Fault tolerance (Engineering), Application software, Energy consumption
Abstract:	Mapping algorithm, which is an important phase of an NoC design tries to map most frequent and most critical communications in such a way that minimize the physical distance between the source and destination nodes. The objective of this paper is to achieve an application-specific NoC design that minimizes the communication cost and improves the fault tolerant properties. First, a heuristic mapping algorithm that produces a set of different mappings in a reasonable time is presented. Although this mapping does not explore the design space thoroughly, it considers a part of design space, which in general minimizes the communication costs of solutions while yielding optimum communication costs in some cases. Comparison of the communication cost results makes it obvious that final solutions found by our proposed approach outperform the results of other methods, which proposed in literature. Then, the used routing algorithm and the concept, vulnerability index, which is considered as a criterion for estimating the fault-tolerance of mapped application, are presented in details. Lower communication cost leads to an NoC with better metrics such as energy consumption and latency; and reducing the vulnerability index optimizes fault tolerant properties of NoC. In order to yield a mapping which considers trade-offs between these two parameters, a linear function is defined and introduced. It is also observed that more flexibility to prioritize solutions within the design space is possible by adjusting a set of if-then rules in fuzzy logic. [ABSTRACT FROM AUTHOR]
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Database:	Engineering Source

Description
Abstract:	Mapping algorithm, which is an important phase of an NoC design tries to map most frequent and most critical communications in such a way that minimize the physical distance between the source and destination nodes. The objective of this paper is to achieve an application-specific NoC design that minimizes the communication cost and improves the fault tolerant properties. First, a heuristic mapping algorithm that produces a set of different mappings in a reasonable time is presented. Although this mapping does not explore the design space thoroughly, it considers a part of design space, which in general minimizes the communication costs of solutions while yielding optimum communication costs in some cases. Comparison of the communication cost results makes it obvious that final solutions found by our proposed approach outperform the results of other methods, which proposed in literature. Then, the used routing algorithm and the concept, vulnerability index, which is considered as a criterion for estimating the fault-tolerance of mapped application, are presented in details. Lower communication cost leads to an NoC with better metrics such as energy consumption and latency; and reducing the vulnerability index optimizes fault tolerant properties of NoC. In order to yield a mapping which considers trade-offs between these two parameters, a linear function is defined and introduced. It is also observed that more flexibility to prioritize solutions within the design space is possible by adjusting a set of if-then rules in fuzzy logic. [ABSTRACT FROM AUTHOR]
ISSN:	1819656X