ADVANCED CONCEPTS FOR FLOATING-BODY MEMORIES.
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| Title: | ADVANCED CONCEPTS FOR FLOATING-BODY MEMORIES. |
|---|---|
| Authors: | GÁMIZ, FRANCISCO1, RODRIGUEZ, NOEL1, CRISTOLOVEANU, SORIN2 |
| Source: | International Journal of High Speed Electronics & Systems. Mar2012, Vol. 21 Issue 1, p-1. 18p. |
| Subjects: | Dynamic random access memory, Capacitor industry, Hydrostatics, Silicon-on-insulator technology, Transistors, Crystal structure, Hysteresis, Holes (Electron deficiencies) |
| Abstract: | With 30nm-class memory cells in production and 20nm-class (20-29nm feature-size) memory targeted for next year, the standard 1-Transistor + 1-Capacitor (1T+1C) DRAM industry is making prominent efforts to improve the scalability of the cell capacitor while maintaining the minimum capacitance requirements for state discrimination, immune to noise (C~25fF/cell). To achieve the capacitance requirement, the DRAM cell has evolved from its initial planar implementation to complex three-dimensional structures. The increment in complexity and the large difference in size between the transistor and capacitor of each cell have motivated the search for Floating-Body Single-Transistor DRAM (1T-DRAM). The underlying idea behind 1T-DRAMs is the development of single-device memory cells with a pronounced hysteresis effect and fast operation. This chapter is focused on the floating-body effect as a primary source of hysteresis. We present new concepts able to deal with the basic limitations of 1T-DRAM while maintaining its simplicity. The floating-body 1T-DRAMs can be reconciled with the aggressive scaling constrains by considering new ideas which make possible the coexistence of electron and holes in the same ultrathin transistor. The best approach is to isolate each type of carrier in an specific potential well which is not created specifically by the bias conditions (unlike standard 1T-DRAMs) but by the physical structure of the device. [ABSTRACT FROM AUTHOR] |
| Copyright of International Journal of High Speed Electronics & Systems is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 84385331 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: ADVANCED CONCEPTS FOR FLOATING-BODY MEMORIES. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22GÁMIZ%2C+FRANCISCO%22">GÁMIZ, FRANCISCO</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22RODRIGUEZ%2C+NOEL%22">RODRIGUEZ, NOEL</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22CRISTOLOVEANU%2C+SORIN%22">CRISTOLOVEANU, SORIN</searchLink><relatesTo>2</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22International+Journal+of+High+Speed+Electronics+%26+Systems%22">International Journal of High Speed Electronics & Systems</searchLink>. Mar2012, Vol. 21 Issue 1, p-1. 18p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Dynamic+random+access+memory%22">Dynamic random access memory</searchLink><br /><searchLink fieldCode="DE" term="%22Capacitor+industry%22">Capacitor industry</searchLink><br /><searchLink fieldCode="DE" term="%22Hydrostatics%22">Hydrostatics</searchLink><br /><searchLink fieldCode="DE" term="%22Silicon-on-insulator+technology%22">Silicon-on-insulator technology</searchLink><br /><searchLink fieldCode="DE" term="%22Transistors%22">Transistors</searchLink><br /><searchLink fieldCode="DE" term="%22Crystal+structure%22">Crystal structure</searchLink><br /><searchLink fieldCode="DE" term="%22Hysteresis%22">Hysteresis</searchLink><br /><searchLink fieldCode="DE" term="%22Holes+%28Electron+deficiencies%29%22">Holes (Electron deficiencies)</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: With 30nm-class memory cells in production and 20nm-class (20-29nm feature-size) memory targeted for next year, the standard 1-Transistor + 1-Capacitor (1T+1C) DRAM industry is making prominent efforts to improve the scalability of the cell capacitor while maintaining the minimum capacitance requirements for state discrimination, immune to noise (C~25fF/cell). To achieve the capacitance requirement, the DRAM cell has evolved from its initial planar implementation to complex three-dimensional structures. The increment in complexity and the large difference in size between the transistor and capacitor of each cell have motivated the search for Floating-Body Single-Transistor DRAM (1T-DRAM). The underlying idea behind 1T-DRAMs is the development of single-device memory cells with a pronounced hysteresis effect and fast operation. This chapter is focused on the floating-body effect as a primary source of hysteresis. We present new concepts able to deal with the basic limitations of 1T-DRAM while maintaining its simplicity. The floating-body 1T-DRAMs can be reconciled with the aggressive scaling constrains by considering new ideas which make possible the coexistence of electron and holes in the same ultrathin transistor. The best approach is to isolate each type of carrier in an specific potential well which is not created specifically by the bias conditions (unlike standard 1T-DRAMs) but by the physical structure of the device. [ABSTRACT FROM AUTHOR] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of International Journal of High Speed Electronics & Systems is the property of World Scientific Publishing Company and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
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| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1142/S0129156412500024 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 18 StartPage: -1 Subjects: – SubjectFull: Dynamic random access memory Type: general – SubjectFull: Capacitor industry Type: general – SubjectFull: Hydrostatics Type: general – SubjectFull: Silicon-on-insulator technology Type: general – SubjectFull: Transistors Type: general – SubjectFull: Crystal structure Type: general – SubjectFull: Hysteresis Type: general – SubjectFull: Holes (Electron deficiencies) Type: general Titles: – TitleFull: ADVANCED CONCEPTS FOR FLOATING-BODY MEMORIES. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: GÁMIZ, FRANCISCO – PersonEntity: Name: NameFull: RODRIGUEZ, NOEL – PersonEntity: Name: NameFull: CRISTOLOVEANU, SORIN IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 03 Text: Mar2012 Type: published Y: 2012 Identifiers: – Type: issn-print Value: 01291564 Numbering: – Type: volume Value: 21 – Type: issue Value: 1 Titles: – TitleFull: International Journal of High Speed Electronics & Systems Type: main |
| ResultId | 1 |