Coping with Parametric Variation at Near-Threshold Voltages.
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| Title: | Coping with Parametric Variation at Near-Threshold Voltages. |
|---|---|
| Authors: | Karpuzcu, Ulya R.1, Kim, Nam Sung2, Torrellas, Josep3 |
| Source: | IEEE Micro. Jul2013, Vol. 33 Issue 4, p6-14. 9p. |
| Subjects: | Microprocessor energy consumption, Electric potential, Integrated circuit energy consumption, Computer architecture, Power density |
| Abstract: | Near-threshold voltage computing (NTC) promises significant improvement in energy efficiency. Unfortunately, when compared to conventional, super-threshold voltage computing (STC), NTC is more sensitive to parametric variation. This results in not only slower and leakier cores, but also substantial speed and power differences between the cores in a many-core chip. NTC's potential cannot be unlocked without addressing the higher impact of variation. To confront variation at the architecture level, the authors introduce a parametric variation model for NTC. They then use the model to show the shortcomings of adapting state-of-the-art STC techniques for variation mitigation to NTC. Finally, they discuss how to tailor variation mitigation to NTC. [ABSTRACT FROM PUBLISHER] |
| Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.) | |
| Database: | Engineering Source |
| FullText | Text: Availability: 0 |
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| Header | DbId: egs DbLabel: Engineering Source An: 89975688 AccessLevel: 6 PubType: Academic Journal PubTypeId: academicJournal PreciseRelevancyScore: 0 |
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| Items | – Name: Title Label: Title Group: Ti Data: Coping with Parametric Variation at Near-Threshold Voltages. – Name: Author Label: Authors Group: Au Data: <searchLink fieldCode="AR" term="%22Karpuzcu%2C+Ulya+R%2E%22">Karpuzcu, Ulya R.</searchLink><relatesTo>1</relatesTo><br /><searchLink fieldCode="AR" term="%22Kim%2C+Nam+Sung%22">Kim, Nam Sung</searchLink><relatesTo>2</relatesTo><br /><searchLink fieldCode="AR" term="%22Torrellas%2C+Josep%22">Torrellas, Josep</searchLink><relatesTo>3</relatesTo> – Name: TitleSource Label: Source Group: Src Data: <searchLink fieldCode="JN" term="%22IEEE+Micro%22">IEEE Micro</searchLink>. Jul2013, Vol. 33 Issue 4, p6-14. 9p. – Name: Subject Label: Subjects Group: Su Data: <searchLink fieldCode="DE" term="%22Microprocessor+energy+consumption%22">Microprocessor energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Electric+potential%22">Electric potential</searchLink><br /><searchLink fieldCode="DE" term="%22Integrated+circuit+energy+consumption%22">Integrated circuit energy consumption</searchLink><br /><searchLink fieldCode="DE" term="%22Computer+architecture%22">Computer architecture</searchLink><br /><searchLink fieldCode="DE" term="%22Power+density%22">Power density</searchLink> – Name: Abstract Label: Abstract Group: Ab Data: Near-threshold voltage computing (NTC) promises significant improvement in energy efficiency. Unfortunately, when compared to conventional, super-threshold voltage computing (STC), NTC is more sensitive to parametric variation. This results in not only slower and leakier cores, but also substantial speed and power differences between the cores in a many-core chip. NTC's potential cannot be unlocked without addressing the higher impact of variation. To confront variation at the architecture level, the authors introduce a parametric variation model for NTC. They then use the model to show the shortcomings of adapting state-of-the-art STC techniques for variation mitigation to NTC. Finally, they discuss how to tailor variation mitigation to NTC. [ABSTRACT FROM PUBLISHER] – Name: AbstractSuppliedCopyright Label: Group: Ab Data: <i>Copyright of IEEE Micro is the property of IEEE and its content may not be copied or emailed to multiple sites without the copyright holder's express written permission. Additionally, content may not be used with any artificial intelligence tools or machine learning technologies. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract.</i> (Copyright applies to all Abstracts.) |
| PLink | https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=egs&AN=89975688 |
| RecordInfo | BibRecord: BibEntity: Identifiers: – Type: doi Value: 10.1109/MM.2013.71 Languages: – Code: eng Text: English PhysicalDescription: Pagination: PageCount: 9 StartPage: 6 Subjects: – SubjectFull: Microprocessor energy consumption Type: general – SubjectFull: Electric potential Type: general – SubjectFull: Integrated circuit energy consumption Type: general – SubjectFull: Computer architecture Type: general – SubjectFull: Power density Type: general Titles: – TitleFull: Coping with Parametric Variation at Near-Threshold Voltages. Type: main BibRelationships: HasContributorRelationships: – PersonEntity: Name: NameFull: Karpuzcu, Ulya R. – PersonEntity: Name: NameFull: Kim, Nam Sung – PersonEntity: Name: NameFull: Torrellas, Josep IsPartOfRelationships: – BibEntity: Dates: – D: 01 M: 07 Text: Jul2013 Type: published Y: 2013 Identifiers: – Type: issn-print Value: 02721732 Numbering: – Type: volume Value: 33 – Type: issue Value: 4 Titles: – TitleFull: IEEE Micro Type: main |
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