APA (7th ed.) Citation

X, L., P, Z., X, H., E, R., K, W., T, T., . . . JAC, I. (2023). Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors. ACS nano, 17(13), 12798. https://doi.org/10.1021/acsnano.3c03932

Chicago Style (17th ed.) Citation

X, Li, Zhou P, Hu X, Rivers E, Watanabe K, Taniguchi T, Akinwande D, Friedman JS, and Incorvia JAC. "Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors." ACS Nano 17, no. 13 (2023): 12798. https://doi.org/10.1021/acsnano.3c03932.

MLA (9th ed.) Citation

X, Li, et al. "Cascaded Logic Gates Based on High-Performance Ambipolar Dual-Gate WSe2 Thin Film Transistors." ACS Nano, vol. 17, no. 13, 2023, p. 12798, https://doi.org/10.1021/acsnano.3c03932.