APA (7th ed.) Citation

Mammei, E., Loi, F., Radice, F., Dati, A., Bruccoleri, M., Bassi, M., & Mazzanti, A. (2014). Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS. IEEE Journal of Solid-State Circuits, 49(12), 3130. https://doi.org/10.1109/JSSC.2014.2345770

Chicago Style (17th ed.) Citation

Mammei, Enrico, Fabrizio Loi, Francesco Radice, Angelo Dati, Melchiorre Bruccoleri, Matteo Bassi, and Andrea Mazzanti. "Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 Nm LP CMOS." IEEE Journal of Solid-State Circuits 49, no. 12 (2014): 3130. https://doi.org/10.1109/JSSC.2014.2345770.

MLA (9th ed.) Citation

Mammei, Enrico, et al. "Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 Nm LP CMOS." IEEE Journal of Solid-State Circuits, vol. 49, no. 12, 2014, p. 3130, https://doi.org/10.1109/JSSC.2014.2345770.