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Design Methodology for Voltage-Scaled Clock Distribution Networks.

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Bibliographic Details
Title:	Design Methodology for Voltage-Scaled Clock Distribution Networks.
Authors:	Sitik, Can¹, Liu, Weicheng², Taskin, Baris¹, Salman, Emre²
Source:	IEEE Transactions on Very Large Scale Integration (VLSI) Systems; Oct2016, Vol. 24 Issue 10, p3080-3093, 14p
Database:	Applied Science & Technology Source

Description
ISSN:	10638210
DOI:	10.1109/TVLSI.2016.2539926