Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.

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Bibliographic Details
Title: Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.
Authors: Travan, Caterina1, caterina.travan@student.tugraz.at, Vatta, Francesca2, vatta@units.it, Babich, Fulvio2, babich@units.it
Source: Journal of Communications Software & Systems; 2020, Vol. 16 Issue 1, p19-29, 11p
Database: Applied Science & Technology Source
Description
ISSN:18456421
DOI:10.24138/jcomss.v16i1.766