View in EDS PDF Full Text

Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.

Saved in:
Bibliographic Details
Title: Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.
Authors: Travan, Caterina1, caterina.travan@student.tugraz.at, Vatta, Francesca2, vatta@units.it, Babich, Fulvio2, babich@units.it
Source: Journal of Communications Software & Systems; 2020, Vol. 16 Issue 1, p19-29, 11p
Database: Applied Science & Technology Source
FullText Links:
  – Type: pdflink
Text:
  Availability: 0
Header DbId: aci
DbLabel: Applied Science & Technology Source
An: 143015776
AccessLevel: 2
PubType: Academic Journal
PubTypeId: academicJournal
PreciseRelevancyScore: 0
IllustrationInfo
Items – Name: Title
  Label: Title
  Group: Ti
  Data: Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.
– Name: Author
  Label: Authors
  Group: Au
  Data: <searchLink fieldCode="AU" term="%22Travan%2C+Caterina%22">Travan, Caterina</searchLink><relatesTo>1</relatesTo>, <i>caterina.travan@student.tugraz.at</i><br /><searchLink fieldCode="AU" term="%22Vatta%2C+Francesca%22">Vatta, Francesca</searchLink><relatesTo>2</relatesTo>, <i>vatta@units.it</i><br /><searchLink fieldCode="AU" term="%22Babich%2C+Fulvio%22">Babich, Fulvio</searchLink><relatesTo>2</relatesTo>, <i>babich@units.it</i>
– Name: TitleSource
  Label: Source
  Group: Src
  Data: <searchLink fieldCode="JN" term="%22Journal+of+Communications+Software+%26+Systems%22">Journal of Communications Software & Systems</searchLink>; 2020, Vol. 16 Issue 1, p19-29, 11p
PLink https://search.ebscohost.com/login.aspx?direct=true&site=eds-live&db=aci&AN=143015776
RecordInfo BibRecord:
  BibEntity:
    Identifiers:
      – Type: doi
        Value: 10.24138/jcomss.v16i1.766
    Languages:
      – Code: eng
        Text: English
    PhysicalDescription:
      Pagination:
        PageCount: 11
        StartPage: 19
    Titles:
      – TitleFull: Recent Results on the Implementation of a Burst Error and Burst Erasure Channel Emulator Using an FPGA Architecture.
        Type: main
  BibRelationships:
    HasContributorRelationships:
      – PersonEntity:
          Name:
            NameFull: Travan, Caterina
      – PersonEntity:
          Name:
            NameFull: Vatta, Francesca
      – PersonEntity:
          Name:
            NameFull: Babich, Fulvio
    IsPartOfRelationships:
      – BibEntity:
          Dates:
            – D: 01
              M: 01
              Text: 2020
              Type: published
              Y: 2020
          Identifiers:
            – Type: issn-print
              Value: 18456421
          Numbering:
            – Type: volume
              Value: 16
            – Type: issue
              Value: 1
          Titles:
            – TitleFull: Journal of Communications Software & Systems
              Type: main
ResultId 1